Datasheet > 71V416YS15BEGI

71V416YS15BEGI

更新时间： 2023-02-26 16:10:06

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
9页	478K
描述
Standard SRAM, 256KX16, 15ns, CMOS, PBGA48, 9 X 9 MM, ROHS COMPLIANT, BGA-48

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71V416YS15BEGI 数据手册

IDT71V416YS, IDT71V416YL 3.3V CMOS Static RAM

4 Meg (256K x 16-Bit)

Commercial and Industrial Temperature Ranges

AC Electrical Characteristics

(VDD = Min. to Max., Commercial and Industrial Temperature Ranges)

71V416S/L10⁽²⁾

71V416S/L12

71V416S/L15

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

READ CYCLE

____

ACS

Read Cycle Time

____

Address Access Time

Chip Select Access Time

____

(1)

CLZ

____

Chip Select Low to Output in Low-Z

Chip Select High to Output in High-Z

Output Enable Low to Output Valid

Output Enable Low to Output in Low-Z

Output Enable High to Output in High-Z

Output Hold from Address Change

Byte Enable Low to Output Valid

(1)

____

tCHZ

____

tOE

(1)

____

tOLZ

____

OHZ

____

(1)

____

tBLZ

Byte Enable Low to Output in Low-Z

Byte Enable High to Output in High-Z

(1)

____

tBHZ

WRITE CYCLE

____

Write Cycle Time

Address Valid to End of Write

Chip Select Low to End of Write

Byte Enable Low to End of Write

Address Set-up Time

Address Hold from End of Write

Write Pulse Width

Data Valid to End of Write

Data Hold Time

(1)

Write Enable High to Output in Low-Z

Write Enable Low to Output in High-Z

(1)

WHZ

____

6442 tbl 10

NOTE:

1. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.

2. Low power 10ns (L10) speed 0ºC to +70ºC temperature range only.

Timing Waveform of Read Cycle No. 1^(1,2,3)

tRC

ADDRESS

tOH

DATAOUT VALID

DATAOUT

PREVIOUS DATAOUT VALID

NOTES:

6442d06

1. WE is HIGH for Read Cycle.

2. Device is continuously selected, CS is LOW.

3. OE, BHE, and BLE are LOW.

6.42

1 2 3 456 7 8 9

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