Datasheet > 71V2558XS100BQG

71V2558XS100BQG

更新时间： 2023-07-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
28页	567K
描述
ZBT SRAM, 256KX18, 5ns, CMOS, PBGA165, 15 X 13 MM, ROHS COMPLIANT, FBGA-165

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数据手册

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71V2558XS100BQG 数据手册

IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs

with 2.5V I/O, Burst Counter, and Pipelined Outputs

Commercial and Industrial Temperature Ranges

RecommendedOperating

TemperatureandSupplyVoltage

Grade

Temperature⁽¹⁾

0°C to +70°C

-40°C to +85°C

VDDQ

Commercial

Industrial

3.3V±5%

2.5V±5%

4875 tbl 05

NOTES:

1. TA is the "instant on" case temperature.

Pin Configuration — 128K x 36

100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81

I/OP3

I/O16

I/O17

I/OP2

I/O15

I/O14

VDDQ

DDQ

VSS

I/O18

I/O19

I/O20

I/O21

I/O13

I/O12

I/O11

I/O10

VSS

VDDQ

DDQ

I/O22

I/O9

I/O8

I/O23

(1)

VDD

(1)

VDD

(3)

VSS

VSS/ZZ

I/O24

I/O25

I/O7

I/O6

VDDQ

VSS

I/O26

I/O27

I/O28

I/O29

I/O

VSS

VDDQ

DDQ

I/O30

I/O31

I/OP4

I/O

I/OP1

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

4875 drw 02

Top View

TQFP

NOTES:

1. Pins 14, 16 and 66 do not have to be connected directly to VDD as long as the input voltage is ≥ VIH.

2. Pins 83 and 84 are reserved for future 8M and 16M respectively.

3. Pin 64 does not have to be connected directly to VSS as long as the input voltage is ≤ VIL; on the latest die revision this

pin supports ZZ (sleep mode).

6.42

1 2 3 456 7 8...28

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