Datasheet > 70V9159L9PFGI8

70V9159L9PFGI8

更新时间： 2022-12-29 20:46:23

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
16页	205K
描述
HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

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70V9159L9PFGI8 数据手册

IDT70V9169/59L

High-Speed 3.3V 16/8K x 9 Dual-Port Synchronous Pipelined Static RAM

Industrial and Commercial Temperature Ranges

Pin Names

Left Port

Right Port

CE0R, CE1R

R/W

Names

Chip Enables

CE0L, CE1L

R/W

Read/Write Enable

Output Enable

Address

(1)

0L - A13L

0R - A13R

I/O0R - I/O8R

CLK

ADS

CNTEN

CNTRST

FT/PIPE

I/O^0L- I/O8L

CLK

ADS

CNTEN

CNTRST

Data Input/Output

Clock

Address Strobe

Counter Enable

Counter Reset

Flow-Through/Pipeline

Power (3.3V)

Ground (0V)

FT/PIPE

5655 tbl 01

NOTE:

1. A13 is a NC for IDT70V9159.

Truth Table I—Read/Write and Enable Control^(1,2,3)

CLK

↑

R/W

I/O0-8

High-Z

DATA^IN

DATA^OUT

High-Z

Mode

Deselected—Power Down

CE0

Deselected—Power Down

↑

Write

↑

Read

↑

Outputs Disabled

5655 tbl 02

NOTES:

1. "H" = VIH, "L" = VIL, "X" = Don't Care.

2. ADS, CNTEN, CNTRST = X.

3. OE is an asynchronous input signal.

6.442

1 2 345 6 7...16

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