Datasheet > 70V9159L7PFGI

70V9159L7PFGI

更新时间： 2022-12-29 20:46:23

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
16页	205K
描述
HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

70V9159L7PFGI 数据手册

IDT70V9169/59L

High-Speed 3.3V 16/8K x 9 Dual-Port Synchronous Pipelined Static RAM

Industrial and Commercial Temperature Ranges

Truth Table II—Address Counter Control^(1,2)

Previous Internal

External

Address

Internal

Address

Used

MODE

CLK

↑

I/O⁽³⁾

DI/O (n) External Address Used

ADS CNTEN CNTRST

L⁽⁴⁾

An + 1

L⁽⁵⁾

I/O(n+1) Counter Enabled—Internal Address generation

↑

An + 1

↑

I/O(n+1) External Address Blocked—Counter disabled (An + 1 reused)

L⁽⁴⁾

DI/O(0)

Counter Reset to Address 0

↑

5655 tbl 03

NOTES:

1. "H" = VIH, "L" = VIL, "X" = Don't Care.

2. CE0, LB, UB, and OE = VIL; CE1 and R/W = VIH.

3. Outputs configured in Flow-Through Output mode: if outputs are in Pipelined mode the data out will be delayed by one cycle.

4. ADS and CNTRST are independent of all other signals including CE0, CE1, UB and LB.

5. The address counter advances if CNTEN = VIL on the rising edge of CLK, regardless of all other signals including CE0, CE1, UB and LB.

Recommended DC Operating

Conditions

Recommended Operating

Temperature and Supply Voltage

Symbol

Parameter

Supply Voltage

Ground

Min.

Typ.

Max.

Unit

Ambient

Grade

Commercial

Temperature⁽¹⁾

0^OC to +70^OC

-40^OC to +85^OC

GND

VDD

3.0

3.3

3.6

3.3V

0.3V

Industrial

0.3V

____

Input High Voltage

Input Low Voltage

2.0

DD+0.3V⁽²⁾

0.8

5655 tbl 04

-0.3⁽¹⁾

____

NOTES:

1. This is the parameter TA. This is the "instant on" case temperature.

5655 tbl 05

NOTES:

1. VIL > -1.5V for pulse width less than 10 ns.

2. VTERM must not exceed VDD+0.3V.

Absolute Maximum Ratings⁽¹⁾

Capacitance⁽¹⁾

(TA = +25°C, f = 1.0MHZ)

Symbol

Rating

Commercial

& Industrial

Unit

Symbol

Parameter

Input Capacitance

Output Capacitance

Conditions⁽²⁾

IN = 3dV

OUT = 3dV

Max. Unit

(2)

TERM

Terminal Voltage

with Respect to

GND

-0.5 to +4.6

CIN

(3)

OUT

BIAS

Temperature

Under Bias

-55 to +125

-65 to +150

^oC

5655 tbl 07

NOTES:

1. These parameters are determined by device characterization, but are not

production tested.

TSTG

Storage

Temperature

2. 3dV references the interpolated capacitance when the input and output switch

from 0V to 3V or from 3V to 0V.

IOUT

DC Output Current

3. C^OUTalso references CI/O.

5655 tbl 06

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated

in the operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect reliability.

2. V^TERMmust not exceed VDD +0.3V for more than 25% of the cycle time or 10ns

maximum, and is limited to < 20mA for the period of VTERM > VDD + 0.3V.

6.42

1 2 3 456 7 8...16

下载PDF

与70V9159L7PFGI相关器件

型号	品牌	描述	获取价格	数据表
70V9159L7PFGI8	IDT	HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM	获取价格
70V9159L9BFG	IDT	HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM	获取价格
70V9159L9BFG8	IDT	HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM	获取价格
70V9159L9BFGI	IDT	HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM	获取价格
70V9159L9BFGI8	IDT	HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM	获取价格
70V9159L9PFG	IDT	HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

70V9159L7PFGI

70V9159L7PFGI 数据手册

与70V9159L7PFGI相关器件

与70V9159L7PFGI相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

70V9159L7PFGI

70V9159L7PFGI 数据手册

与70V9159L7PFGI相关器件

与70V9159L7PFGI相关文章

您还可以找

您在本页遇到什么问题？