Datasheet > 6116LA45TPGI

6116LA45TPGI

更新时间： 2024-01-14 02:08:06

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器光电二极管
页数	文件大小	规格书
11页	611K
描述
Standard SRAM, 2KX8, 45ns, CMOS, PDIP24, 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-24

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6116LA45TPGI 数据手册

IDT6116SA/LA

CMOS Static RAM 2K (16K x 8-Bit)

Military, Commercial, and Industrial Temperature Ranges

Timing Waveform of Read Cycle No. 1^(1,3)

ADDRESS

tAA

tOH

(5)

tOHZ

(5)

tOLZ

(5)

ACS

(5)

CHZ

CLZ

DATA

VALID

DATAOUT

ICC

Supply

Currents

ISB

3089 drw 06

Timing Waveform of Read Cycle No. 2^(1,2,4)

tRC

ADDRESS

tAA

tOH

DATA VALID

DATAOUT

PREVIOUS DATA VALID

3089 drw 07

Timing Waveform of Read Cycle No. 3^(1,3,4)

(5)

tACS

CHZ

(5)

tCLZ

DATAOUT

DATA VALID

3089 drw 08

NOTES:

1. WE is HIGH for Read cycle.

2. Device is continously selected, CS is LOW.

3. Address valid prior to or coincident with CS transition LOW.

4. OE is LOW.

5. Transition is measured ±500mV from steady state.

6.42

1...4 5 678 9 10 11

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