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5V9910A-7SOGI8 PDF预览

5V9910A-7SOGI8

更新时间: 2024-01-12 13:07:01
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
6页 89K
描述
PLL Based Clock Driver, 5V Series, 8 True Output(s), 0 Inverted Output(s), PDSO24, 0.300 INCH, SOIC-24

5V9910A-7SOGI8 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.300 INCH, SOIC-24针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.51
系列:5V输入调节:STANDARD
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:15.4 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:24
实输出次数:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.75 ns
座面最大高度:2.65 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
最小 fmax:85 MHzBase Number Matches:1

5V9910A-7SOGI8 数据手册

 浏览型号5V9910A-7SOGI8的Datasheet PDF文件第1页浏览型号5V9910A-7SOGI8的Datasheet PDF文件第2页浏览型号5V9910A-7SOGI8的Datasheet PDF文件第3页浏览型号5V9910A-7SOGI8的Datasheet PDF文件第4页浏览型号5V9910A-7SOGI8的Datasheet PDF文件第6页 
IDT5V9910A  
COMMERCIALANDINDUSTRIALTEMPERATURERANGES  
3.3VLOWSKEWPLLCLOCKDRIVERTURBOCLOCKJR.  
AC TEST LOADS AND WAVEFORMS  
1ns  
1ns  
VCC  
3.0V  
2.0V  
Vth =1.5V  
0.8V  
150  
0V  
Output  
LVTTL Input Test Waveform  
150Ω  
20pF  
tOFALL  
tORISE  
Test Load  
2.0V  
0.8V  
LVTTL Output Waveform  
AC TIMING DIAGRAM  
tREF  
tRPWH  
tRPWL  
REF  
tPD  
tODCV  
tODCV  
FB  
tJR  
Q
tSKEW  
tSKEW  
OTHER Q  
NOTES:  
Skew: The time between the earliest and the latest output transition among all outputs when all are loaded with 20pF and terminated with 75to VCC/2.  
tSKEW:  
The skew between all outputs.  
tDEV:  
The output-to-output skew between any two devices operating under the same conditions (VCC, ambient temperature, air flow, etc.)  
tODCV: The deviation of the output from a 50% duty cycle.  
tORISE and tOFALL are measured between 0.8V and 2V.  
tLOCK:  
The time that is required before synchronization is achieved. This specification is valid only after VCC is stable and within normal operating limits. This parameter  
is measured from the application of a new signal or frequency at REF or FB until tPD is within specified limits.  
5

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