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5CEBA2F23C8 PDF预览

5CEBA2F23C8

更新时间: 2024-01-12 07:12:58
品牌 Logo 应用领域
英特尔 - INTEL 可编程逻辑
页数 文件大小 规格书
64页 1355K
描述
Field Programmable Gate Array, PBGA484, FBGA-484

5CEBA2F23C8 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:BGA包装说明:BGA,
针数:484Reach Compliance Code:compliant
风险等级:5.75JESD-30 代码:S-PBGA-B484
长度:23 mm端子数量:484
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):NOT SPECIFIED可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
座面最大高度:2 mm最大供电电压:1.13 V
最小供电电压:1.07 V标称供电电压:1.1 V
表面贴装:YES温度等级:OTHER
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:23 mmBase Number Matches:1

5CEBA2F23C8 数据手册

 浏览型号5CEBA2F23C8的Datasheet PDF文件第2页浏览型号5CEBA2F23C8的Datasheet PDF文件第3页浏览型号5CEBA2F23C8的Datasheet PDF文件第4页浏览型号5CEBA2F23C8的Datasheet PDF文件第6页浏览型号5CEBA2F23C8的Datasheet PDF文件第7页浏览型号5CEBA2F23C8的Datasheet PDF文件第8页 
Electrical Characteristics  
Page 5  
Table 3. Recommended Operating Conditions for Cyclone V Devices (Part 2 of 2)  
Symbol  
Description  
Power supply ramp time  
Condition  
Standard POR  
Fast POR  
Minimum Typical Maximum Unit  
200 µs  
200 µs  
100 ms  
4 ms  
(4)  
tRAMP  
Notes to Table 3:  
(1) VCCPD must be 2.5 V when VCCIO is 2.5, 1.8, 1.5, 1.35, 1.25 or 1.2 V. VCCPD must be 3.0 V when VCCIO is 3.0 V. VCCPD must be 3.3 V when VCCIO  
is 3.3 V.  
(2) PLL digital voltage is regulated from VCCA_FPLL  
.
(3) If you do not use the design security feature in Cyclone V devices, connect VCCBAT to a 1.5-V, 2.5-V, or 3.0-V power supply. The power-on reset  
(POR) circuitry monitors VCCBAT. Cyclone V devices do not exit POR if VCCBAT is not powered up.  
(4) This is also applicable to HPS power supply. For HPS power supply, refer to tRAMP specifications for standard POR when HPS_PORSEL = 0 and  
tRAMP specifications for fast POR when HPS_PORSEL = 1.  
Table 4 lists the transceiver power supply recommended operating conditions for  
Cyclone V GX, GT, SX, and ST devices.  
Table 4. Transceiver Power Supply Operating Conditions for Cyclone V GX, GT, SX, and ST Devices  
Symbol  
VCCH_GXBL  
Description  
Minimum  
2.375  
Typical  
2.5  
Maximum  
2.625  
Unit  
V
Transceiver high voltage power (left side)  
Transmitter and receiver power (left side)  
Clock network power (left side)  
(1), (2)  
VCCE_GXBL  
VCCL_GXBL  
1.07/1.17  
1.07/1.17  
1.1/1.2  
1.1/1.2  
1.13/1.23  
1.13/1.23  
V
(1), (2)  
V
Notes to Table 4:  
(1) Altera recommends increasing the VCCE_GXBL and VCCL_GXBL typical value from 1.1 V to 1.2 V for Cyclone V GT FPGA systems which require full  
compliance to the PCIe Gen2 transmit jitter specification. For more information about the maximum full duplex channels recommended in  
Cyclone V GT and ST devices under this condition, refer to the Transceiver Protocol Configurations in Cyclone V Devices chapter.  
(2) Altera recommends increasing the VCCE_GXBL and VCCL_GXBL typical value from 1.1 V to 1.2 V for full compliance to CPRI transmit jitter  
specification at 4.9152 Gbps (Cyclone V GT and ST devices) and 6.144Gbps (Cyclone V GT devices only). For more information about the  
maximum full duplex channels recommended in Cyclone V GT devices for CPRI 6.144 Gbps, refer to the Transceiver Protocol Configurations  
in Cyclone V Devices chapter.  
Table 5 lists the steady-state voltage values expected from Cyclone V  
system-on-a-chip (SoC) devices with ARM®-based hard processor system (HPS).  
Power supply ramps must all be strictly monotonic, without plateaus.  
Table 5. HPS Power Supply Operating Conditions for Cyclone V SE, SX, and ST Devices (1) (Part 1 of 2)  
Symbol  
VCC_HPS  
Description  
Minimum  
Typical  
Maximum  
Unit  
HPS core voltage and periphery circuitry power  
supply  
1.07  
1.1  
1.13  
V
HPS I/O pre-driver (3.3 V) power supply  
HPS I/O pre-driver (3.0 V) power supply  
HPS I/O pre-driver (2.5 V) power supply  
HPS I/O buffers (3.3 V) power supply  
HPS I/O buffers (3.0 V) power supply  
HPS I/O buffers (2.5 V) power supply  
HPS I/O buffers (1.8 V) power supply  
HPS I/O buffers (1.5 V) power supply  
3.135  
2.85  
3.3  
3.0  
2.5  
3.3  
3.0  
2.5  
1.8  
1.5  
1.35  
1.2  
3.465  
3.15  
V
V
V
V
V
V
V
V
V
V
(2)  
VCCPD_HPS  
2.375  
3.135  
2.85  
2.625  
3.465  
3.15  
2.375  
1.71  
2.625  
1.89  
VCCIO_HPS  
1.425  
1.283  
1.14  
1.575  
1.418  
1.26  
(3)  
HPS I/O buffers (1.35 V) power supply  
HPS I/O buffers (1.2 V) power supply  
December 2013 Altera Corporation  
Cyclone V Device Datasheet  

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