Datasheet > 5CEBA2F17C6

5CEBA2F17C6

更新时间： 2024-02-04 14:20:56

品牌	Logo	应用领域
英特尔 - INTEL		栅可编程逻辑
页数	文件大小	规格书
64页	1355K
描述
Field Programmable Gate Array, PBGA256, FBGA-256

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5CEBA2F17C6 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	LBGA, BGA256,16X16,40	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	2
JESD-30 代码：	S-PBGA-B256	长度：	17 mm
输入次数：	128	逻辑单元数量：	25000
输出次数：	128	端子数量：	256
最高工作温度：	85 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	LBGA
封装等效代码：	BGA256,16X16,40	封装形状：	SQUARE
封装形式：	GRID ARRAY, LOW PROFILE	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	1.1,1.2/3.3,2.5 V	可编程逻辑类型：	FIELD PROGRAMMABLE GATE ARRAY
认证状态：	Not Qualified	座面最大高度：	1.55 mm
子类别：	Field Programmable Gate Arrays	最大供电电压：	1.13 V
最小供电电压：	1.07 V	标称供电电压：	1.1 V
表面贴装：	YES	技术：	CMOS
温度等级：	OTHER	端子形式：	BALL
端子节距：	1 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	17 mm
Base Number Matches：	1

5CEBA2F17C6 数据手册

Page 6

Electrical Characteristics

Table 5. HPS Power Supply Operating Conditions for Cyclone V SE, SX, and ST Devices ⁽¹⁾(Part 2 of 2)

Symbol

Description

Minimum

3.135

2.85

Typical

3.3

Maximum

3.465

3.15

Unit

HPS reset and clock input pins (3.3 V) power supply

HPS reset and clock input pins (3.0 V) power supply

HPS reset and clock input pins (2.5 V) power supply

HPS reset and clock input pins (1.8 V) power supply

HPS PLL analog voltage regulator power supply

HPS and FPGA shared auxiliary power supply

3.0

V_{CCRSTCLK_HPS}

2.375

1.71

2.5

2.625

1.89

1.8

V_{CCPLL_HPS}

2.375

2.5

2.625

V_{CC_AUX_SHARED}

Notes to Table 5:

2.5

(1) Refer to Table 3 for the steady-state voltage values expected from the FPGA portion of the Cyclone V SoC devices.

(2) V_{CCPD_HPS}must be 2.5 V when V_{CCIO_HPS}is 2.5, 1.8, 1.5, or 1.2 V. V_{CCPD_HPS}must be 3.0 V when V_{CCIO_HPS}is 3.0 V. V_{CCPD_HPS}must be 3.3 V when

V_{CCIO_HPS}is 3.3 V.

(3) V_{CCIO_HPS}1.35 V is supported for HPS row I/O bank only.

DC Characteristics

This section lists the following specifications:

■

Supply Current and Power Consumption

I/O Pin Leakage Current

Bus Hold Specifications

OCT Specifications

Pin Capacitance

Hot Socketing

Supply Current and Power Consumption

Standby current is the current drawn from the respective power rails used for power

budgeting.

Altera offers two ways to estimate power for your design—the Excel-based Early

Power Estimator (EPE) and the Quartus^®II PowerPlay Power Analyzer feature.

Use the Excel-based Early Power Estimator (EPE) before you start your design to

estimate the supply current for your design. The EPE provides a magnitude estimate

of the device power because these currents vary greatly with the resources you use.

The Quartus II PowerPlay Power Analyzer provides better quality estimates based on

the specifics of the design after you complete place-and-route. The PowerPlay Power

Analyzer can apply a combination of user-entered, simulation-derived, and estimated

signal activities that, when combined with detailed circuit models, yields very

accurate power estimates.

For more information about power estimation tools, refer to the PowerPlay Early Power

Estimator User Guide and the PowerPlay Power Analysis chapter in the Quartus II

Handbook.

Cyclone V Device Datasheet

December 2013 Altera Corporation

1...3 4 567 8 9...64

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与5CEBA2F17C6相关器件

型号	品牌	描述	获取价格	数据表
5CEBA2F17C6N	ALTERA	Field Programmable Gate Array, PBGA256, ROHS COMPLIANT, FBGA-256	获取价格
5CEBA2F17C7	INTEL	Field Programmable Gate Array, PBGA256, FBGA-256	获取价格
5CEBA2F17C7N	ALTERA	Field Programmable Gate Array, PBGA256, ROHS COMPLIANT, FBGA-256	获取价格
5CEBA2F17C8	INTEL	Field Programmable Gate Array, PBGA256, FBGA-256	获取价格
5CEBA2F17C8N	ALTERA	Field Programmable Gate Array, PBGA256, ROHS COMPLIANT, FBGA-256	获取价格
5CEBA2F17I7	INTEL	Field Programmable Gate Array, PBGA256, FBGA-256	获取价格

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