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5962F1123501VXC PDF预览

5962F1123501VXC

更新时间: 2023-12-26 09:00:05
品牌 Logo 应用领域
英飞凌 - INFINEON 静态存储器
页数 文件大小 规格书
19页 958K
描述
Asynchronous SRAM

5962F1123501VXC 数据手册

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CYRS1049DV33  
4-Mbit (512K × 8) Static RAM  
with RadStop™ Technology  
4-Mbit (512K  
× 8) Static RAM with RadStop™ Technology  
Transistor-transistor logic (TTL) compatible inputs and outputs  
Easy memory expansion with CE and OE features  
Radiation Performance  
Radiation Data  
Available in Gold plated leads 36-pin ceramic flat package  
Total dose =300 Krad  
Functional Description  
Soft  
error rate (both heavy ion and proton)  
Heavy ions 1 × 10-10 upsets/bit-day with single-error  
The CYRS1049DV33 is a high-performance complementary  
metal oxide semiconductor (CMOS) static RAM organized as  
512K words by 8 bits with RadStop™ technology. Cypress’  
state-of-the-art RadStop technology is radiation hardened  
through proprietary design and process hardening techniques.  
The 4-Mbit fast asynchronous SRAM with RadStop technology  
is also QML V certified with Defense Logistics Agency Land and  
Maritime (DLAM).  
correction, double error detection error detection and  
correction (SEC-DED EDAC)  
Neutron = 2.0 × 1014 N/cm2  
Dose rate > 2.0 × 109 (rad(Si)/s)  
Latch up immunity LET = 120 MeV.cm2/mg (125 C)  
Processing Flows  
To write to the device, take Chip Enable (CE) and Write Enable  
(WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7)  
is then written into the location specified on the address pins (A0  
through A18).  
V Grade - Class V flow in compliance with MIL-PRF 38535  
Prototyping Options  
CYPT1049DV33 prototype units with same functional and  
timing as flight units using non-radiation hardened die in a  
36-pin ceramic flat package  
To read from the device, take Chip Enable (CE) and Output  
Enable (OE) LOW while forcing the Write Enable (WE) HIGH.  
Under these conditions, the contents of the memory location  
specified by the address pins appear on the I/O pins. See the  
Truth Table on page 12 for a complete description of read and  
write modes.  
Features  
Temperature ranges  
Military/Space: –55 °C to 125 °C  
The eight input or output pins (I/O0 through I/O7) are placed in a  
high impedance state when the device is deselected (CE HIGH),  
the outputs are disabled (OE HIGH), or during a write operation  
(CE LOW, and WE LOW)  
High speed  
tAA = 12 ns  
Low active power  
ICC = 95 mA at 12 ns (PMAX = 315 mW)  
The CYRS1049DV33 is available in a ceramic 36-pin Flat  
package with center power and ground (revolutionary) pinout.  
Low CMOS standby power  
ISB2 = 15 mA  
Easy memory expansion is provided by utilizing OE, CE, and  
tri-state drivers.  
2.0 V data retention  
For a complete list of related documentation, click here.  
Automatic power-down when deselected  
Selection Guide  
Description  
Maximum access time  
Military/Space  
Unit  
ns  
12  
95  
15  
Maximum operating current  
mA  
mA  
Maximum CMOS standby current  
Cypress Semiconductor Corporation  
Document Number: 001-64292 Rev. *J  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised June 13, 2019  

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