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5962-9472502MPA PDF预览

5962-9472502MPA

更新时间： 2024-02-09 21:49:03
品牌 Logo 应用领域
美国国家半导体 - NSC 运算放大器放大器电路
页数 文件大小 规格书
8页 866K
描述
Dual Wideband Monolithic Op Amp with Disable

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5962-9472502MPA 技术参数

生命周期：Obsolete包装说明：DIP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.33.00.01风险等级：5.56
放大器类型：OPERATIONAL AMPLIFIER标称共模抑制比：63 dB
最大输入失调电压：6000 µVJESD-30 代码：R-GDIP-T8
负供电电压上限：-16.5 V标称负供电电压 (Vsup)：-15 V
功能数量：2端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
认证状态：Not Qualified筛选级别：MIL-STD-883
座面最大高度：5.08 mm标称压摆率：2000 V/us
供电电压上限：16.5 V标称供电电压 (Vsup)：15 V
表面贴装：NO温度等级：INDUSTRIAL
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL标称均一增益带宽：92000 kHz
宽度：7.62 mmBase Number Matches：1

5962-9472502MPA 数据手册

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Twisted-Pair Driver.  
Twisted-pair cables are used in many applications such  
as telephony, video and data communications. The  
CLC432's two matched channels make it well suited for  
such applications and is illustrated in Fig. 5.  
Rg  
634Ω  
Rf  
634Ω  
Ri  
75Ω  
½CLC431 13  
½R  
R
12  
3
50Ω  
Channel 1  
SELECT  
Rs  
Vout  
NC  
75Ω  
½Ro  
10  
Channel 2  
½CLC432  
Ri  
RL  
75Ω  
5
9
½CLC431  
75Ω  
50Ω  
Ro  
634Ω  
Optional  
Vin  
Rf  
1kΩ  
Rg  
634Ω  
½CLC432  
½Ro  
-15V  
R
Fig. 3  
R
The optional 1kΩ pull-down resistor connected from the  
output of the 2:1 mux to the negative power supply (-VCC)  
results in improved differential gain and phase perfor-  
mance (0.02% and 0.01°) at PAL video levels.  
Fig. 5  
CCD Amplifier.  
The CLC432 can easily be configured as 10MSPS CCD  
amplifier with DC level shifting as illustrated in Fig 6.  
Notice that one of the CLC432's channels buffers the  
CCD output while the other channel is configured with  
both an inverting DC gain and an AC gain in order to  
achieve the overall transfer function shown in Fig. 6.  
Switched Gain Amplifier (CLC431)  
As seen from the front page, the CLC431 can also be  
configured as a switched-gain amplifier that is similar to  
the 2:1 mux. Configuring each of the two CLC431's  
amplifiers with different non-inverting gains and tying the  
twoinputstogether(eliminatingoneoftheinput-terminat-  
ing resistors) allows the CLC431 to switch an input signal  
between two different gains.  
Vin  
Vin  
½CLC432  
Vout  
R
½CLC432  
Inactive Channel Impedances (CLC431)  
1kΩ  
The impedance that is seen when looking into the output  
of a disabled CLC431 is typically represented as  
1MΩ||16pF. The inverting input impedance becomes  
very high, essentially open. Therefore, the impedance  
presented by a disabled channel is (Rf+Rg)||  
(Ri+(1MΩ||16pF))asillustratedinFig. 4. Itshouldalsobe  
noted that any trace capacitance that is associated with  
the common output connection will add in parallel to that  
presented by the CLC431's inactive channel.  
Vref  
Rx  
Rf  
Rg  
0.1µF  
−Vout  
Vout  
Rf  
s
Vref  
DC  
= 1+  
=
1
V
Rg  
Rx  
Rf  
in  
s +  
RgCg  
1
Rx >>  
2πfinCg  
for Rx >> Rg  
Fig. 6  
Rg  
Rf  
Ordering Information  
Impedance  
Presented  
by  
Disabled  
CLC431  
Ri  
Model  
Temperature Range Description  
Impedance  
Presented  
by  
Inactive  
Channel  
CLC431AJP  
CLC431AJE  
CLC431ALC  
CLC431A8B  
CLC431AMC  
CLC432AJP  
CLC432AJE  
CLC432ALC  
CLC432A8B  
CLC432AMC  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-55°C to +125°C  
-55°C to +125°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-55°C to +125°C  
-55°C to +125°C  
14-pinPDIP  
14-pin SOIC  
dice  
1MΩ  
16pF  
Vin  
14-pinCerDIP,MIL-STD-883  
dice,MIL-STD-883  
8-pin PDIP  
Rs  
Vout  
Ri  
Active  
Channel  
RL  
8-pin SOIC  
dice  
Rf  
8-pinCerDIP,MIL-STD-883  
dice,MIL-STD-883  
Rg  
DESCSMDnumbers:5962-94725.  
Fig. 4  
http://www.national.com  
6
1...345678

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