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5962-9317901MLA PDF预览

5962-9317901MLA

更新时间： 2024-02-26 21:40:31
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
28页 462K
描述
CMOS, Complete 12-bit, 100 kHz, Sampling ADC with ±10V Input Signal Range

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5962-9317901MLA 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：DIP
包装说明：DIP, DIP24,.3针数：24
Reach Compliance Code：not_compliantECCN代码：3A001.A.2.C
HTS代码：8542.39.00.01风险等级：5.1
最大模拟输入电压：10 V最小模拟输入电压：-10 V
最长转换时间：9 µs转换器类型：ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码：R-CDIP-T24JESD-609代码：e0
最大线性误差 (EL)：0.0244%标称负供电电压：-5 V
模拟输入通道数量：1位数：12
功能数量：1端子数量：24
最高工作温度：125 °C最低工作温度：-55 °C
输出位码：BINARY输出格式：SERIAL, PARALLEL, 8 BITS, PARALLEL, WORD
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：DIP
封装等效代码：DIP24,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT APPLICABLE
电源：+-5 V认证状态：Qualified
采样并保持/跟踪并保持：TRACK筛选级别：MIL-STD-883
子类别：Analog to Digital Converters标称供电电压：5 V
表面贴装：NO技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn63Pb37)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT APPLICABLE
Base Number Matches：1

5962-9317901MLA 数据手册

 浏览型号5962-9317901MLA的Datasheet PDF文件第19页浏览型号5962-9317901MLA的Datasheet PDF文件第20页浏览型号5962-9317901MLA的Datasheet PDF文件第21页浏览型号5962-9317901MLA的Datasheet PDF文件第23页浏览型号5962-9317901MLA的Datasheet PDF文件第24页浏览型号5962-9317901MLA的Datasheet PDF文件第25页 
AD7870/AD7875/AD7876  
APPLICATIONS INFORMATION  
Good printed circuit board (PCB) layout is as important as  
the overall circuit design itself in achieving high speed analog-  
to-digital performance. The designer has to be conscious of  
noise both in the ADC itself and in the preceding analog  
circuitry. Switching mode power supplies are not recommended  
because the switching spikes feed through to the comparator  
causing noisy code transitions. Other causes of concern are  
ground loops and digital feedthrough from microprocessors.  
These are factors which influence any ADC, and a proper  
PCB layout which minimizes these effects is essential for best  
performance.  
AD7870/AD7875/AD7876 DGND to this single analog  
ground point. Do not connect any other digital grounds to  
this analog ground point.  
Low impedance analog and digital power supply common  
returns are essential to low noise operation of the ADC, so  
make the foil width for these tracks as wide as possible. The  
use of ground planes minimizes impedance paths and also  
guards the analog circuitry from digital noise. The circuit  
layout has both analog and digital ground planes which are  
kept separated and only joined together at the AD7870/  
AD7875/AD7876 AGND pin.  
LAYOUT HINTS  
NOISE  
Ensure that the layout for the printed circuit board has the  
digital and analog signal lines separated as much as possible.  
Take care not to run any digital track alongside an analog signal  
track. Guard (screen) the analog input with AGND.  
Keep the input signal leads to VIN and signal return leads from  
AGND as short as possible to minimize input noise coupling.  
In applications where this is not possible, use a shielded cable  
between the source and the ADC. Reduce the ground circuit  
impedance as much as possible since any potential difference  
in grounds between the signal source and the ADC appears as  
an error voltage in series with the input signal.  
Establish a single point analog ground (star ground) separate  
from the logic system ground at the AGND pin or as close  
as possible to the ADC. Connect all other grounds and the  
Rev. C | Page 22 of 28  
 
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