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5962-9317706VZX PDF预览

5962-9317706VZX

更新时间: 2023-08-15 00:00:00
品牌 Logo 应用领域
TEMIC 先进先出芯片
页数 文件大小 规格书
22页 382K
描述
FIFO, 16KX9, 15ns, Asynchronous, CMOS, CDFP28, 0.400 INCH, FP-28

5962-9317706VZX 数据手册

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Once half the memory is filled, and during the falling edge of the next write operation,  
the Half-Full Flag (HF) will be set to low and remain in this state until the difference  
between the write and read pointers is less than or equal to half of the total available  
memory in the device. The Half-Full Flag (HF) is then reset by the rising edge of the  
read operation.  
To prevent data overflow, the Full Flag (FF) will go low, inhibiting further write opera-  
tions. On completion of a valid read operation, the Full Flag (FF) will go high after TRFF,  
allowing a valid write to begin. When the FIFO stack is full, the internal write pointer is  
blocked from W, so that external changes to W will have no effect on the full FIFO stack.  
Read Enable (R)  
A read cycle is initiated on the falling edge of the Read Enable (R) provided that the  
Empty Flag (EF) is not set. The data is accessed on a first in/first out basis, not including  
any current write operations. After Read Enable (R) goes high, the Data Outputs (Q0 -  
Q8) will return to a high impedance state until the next Read operation. When all the  
data in the FIFO stack has been read, the Empty Flag (EF) will go low, allowing the  
finalread cycle, but inhibiting further read operations while the data outputs remain in  
a high impedance state. Once a valid write operation has been completed, the Empty  
Flag (EF) will go high after tWEF and a valid read may then be initiated. When the FIFO  
stack is empty, the internal read pointer is blocked from R, so that external changes to R  
will have no effect on the empty FIFO stack.  
First Load/Retransmit  
(FL/RT)  
This is a dual-purpose input. In the Depth Expansion Mode, this pin is connected to  
ground to indicate that it is the first loaded (see Operating Modes). In the Single Device  
Mode, this pin acts as the retransmit input. The Single Device Mode is initiated by con-  
necting the Expansion In (XI) to ground.  
The M672061F can be set to retransmit data when the Retransmit Enable Control (RT)  
input is pulsed low. A retransmit operation will set the internal read point to the first loca-  
tion and will not affect the write pointer. Read Enable (R) and Write Enable (W) must be  
in the high state during retransmit. The retransmit feature is intended for use when a  
number of writes are equal to or less than the depth of the FIFO has occured since the  
last RS cycle. The retransmit feature is not compatible with the Depth Expansion Mode  
and will affect the Half-Full Flag (HF), in accordance with the relative locations of the  
read and write pointers.  
Expansion In (XI)  
Full Flag (FF)  
This input is a dual-purpose pin. Expansion In (XI) is connected to GND to indicate an  
operation in the single device mode. Expansion In (XI) is connected to Expansion Out  
(XO) of the previous device in the Depth Expansion or Daisy Chain modes.  
The Full Flag (FF) will go low, inhibiting further write operations when the write pointer is  
one location less than the read pointer, indicating that the device is full. If the read  
pointer is not moved after Reset (RS), the Full Flag (FF) will go low after 16384 writes.  
Empty Flag (EF)  
The Empty Flag (EF) will go low, inhibiting further read operations when the read pointer  
is equal to the write pointer, indicating that the device is empty.  
Expansion Out/Half-Full  
Flag (XO/HF)  
This is a dual-purpose output. In the single device mode, when Expansion In (XI) is con-  
nected to ground, this output acts as an indication of a half-full memory.  
The M672061F offers a variable offset for the Half Full condition. The offset is loaded  
into a register during a reset cycle. When RS is low, the Programmable Half Full Flag  
(PHF) can be loaded from the DATA inputs I0-I8 by pulsing W low or from the DATA out-  
5
M672061F  
Rev. E20-Aug-01  

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