Datasheet > 5962-8957101YC

5962-8957101YC

更新时间： 2024-02-20 19:39:29

品牌	Logo	应用领域
安捷伦 - AGILENT		输出元件光电
页数	文件大小	规格书
12页	267K
描述
Logic IC Output Optocoupler, 2-Element, 1500V Isolation, 40MBps, HERMETIC SEALED, DIP-8

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技术参数
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5962-8957101YC 技术参数

生命周期：	Transferred	包装说明：	HERMETIC SEALED, DIP-8
Reach Compliance Code：	unknown	ECCN代码：	3A001.A.2.C
HTS代码：	8541.40.80.00	风险等级：	5.02
Is Samacsys：	N	其他特性：	OPEN COLLECTOR, TRI STATE, HIGH RELIABILITY
配置：	COMPLEX	标称数据速率：	40 MBps
最大正向电流：	0.01 A	最大绝缘电压：	1500 V
元件数量：	2	最大通态电流：	0.025 A
最高工作温度：	125 °C	最低工作温度：	-55 °C
光电设备类型：	LOGIC IC OUTPUT OPTOCOUPLER	最小供电电压：	4.75 V
Base Number Matches：	1

5962-8957101YC 数据手册

Notes:

1. Not to exceed 5% duty factor, not to exceed 50 µsec pulse width.

2. All devices are considered two-terminal devices: measured between all input leads or terminals shorted together and all output leads

or terminals shorted together.

3. This is a momentary withstand test, not an operating condition.

4. t_PHLpropagation delay is measured from the 50% point on the rising edge of the input current pulse to the 1.5 V point on the falling

edge of the output pulse. The t_PLHpropagation delay is measured from the 50% point on the falling edge of the input current pulse to

the 1.5 V point on the rising edge of the output pulse. Pulse Width Distortion, PWD = |t_PHL- t_PLH|.

5. CM_Lis the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state

(V_O(MAX)< 0.8 V). CM_His the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the

logic high state (V_O(MIN)> 2.0 V).

6. Duration of output short circuit time not to exceed 10 ms.

7. Power Supply Noise Immunity is the peak to peak amplitude of the ac ripple voltage on the V_CCline that the device will withstand and

still remain in the desired logic state. For desired logic high state, V_OH(MIN)> 2.0 V, and for desired logic low state, V_OL(MAX)< 0.8 V.

8. Measured between adjacent input pairs shorted together for each multichannel device.

9. Each channel.

10. Standard parts receive 100% testing at 25°C (Subgroups 1 and 9). SMD, Class H and Class K parts receive 100% testing at 25, 125,

and –55°C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).

11. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed to

limits specified for all lots not specifically tested.

12. Propagation delay skew is defined as the difference between the minimum and maximum propagation delays for any given group of

optocouplers with the same part number that are all switching at the same time under the same operating conditions.

13. The HCPL-6430, HCPL-6431, and HCPL-643K dual channel parts function as two independent single channel units. Use the single

channel parameter limits.

Figure 1. Typical Logic Low Output

Voltage vs. Logic Low Output Current.

Figure 2. Typical Logic High Output

Voltage vs. Logic High Output Current.

Figure 3. Typical Output Voltage vs.

Input Forward Current.

Figure 4. Typical Diode Input Forward

Current Characteristic.

1...5 6 789 10 11 12

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与5962-8957101YC相关器件

型号	品牌	描述	获取价格	数据表
5962-89571022A	AGILENT	Logic IC Output Optocoupler, 2-Element, 1500V Isolation, 40MBps, HERMETIC SEALED, CERAMIC,	获取价格
5962-89571022A	AVAGO	2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 40Mbps, CERAMIC, LCCC-20	获取价格
5962-89571022X	AVAGO	Logic IC Output Optocoupler, 2-Element, 1500V Isolation, 40MBps, HERMETIC SEALED, CERAMIC,	获取价格
5962-8957103KPC	AVAGO	2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 40Mbps, HERMETIC SEALED, CERAMIC, DIP-8	获取价格
5962-8957103KXA	AVAGO	2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 40Mbps, SURFACE MOUNT, HERMETIC SEALED, CERAMIC, DIP-8	获取价格
5962-8957103KYA	AVAGO	2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 40Mbps, HERMETIC SEALED, CERAMIC, DIP-8	获取价格

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