Datasheet > 5962-8852515XX

5962-8852515XX

更新时间： 2024-01-25 21:00:45

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程只读存储器电动程控只读存储器电可擦编程只读存储器内存集成电路
页数	文件大小	规格书
25页	659K
描述
EEPROM, 32KX8, 150ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28

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5962-8852515XX 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Transferred	零件包装代码：	DIP
包装说明：	DIP,	针数：	28
Reach Compliance Code：	compliant	ECCN代码：	3A001.A.2.C
HTS代码：	8542.32.00.51	风险等级：	5.1
最长访问时间：	150 ns	其他特性：	AUTOMATIC WRITE
JESD-30 代码：	R-GDIP-T28	JESD-609代码：	e0
长度：	37.215 mm	内存密度：	262144 bit
内存集成电路类型：	EEPROM	内存宽度：	8
功能数量：	1	端子数量：	28
字数：	32768 words	字数代码：	32000
工作模式：	ASYNCHRONOUS	最高工作温度：	125 °C
最低工作温度：	-55 °C	组织：	32KX8
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
并行/串行：	PARALLEL	峰值回流温度（摄氏度）：	225
编程电压：	5 V	认证状态：	Not Qualified
筛选级别：	MIL-STD-883 Class B	座面最大高度：	5.72 mm
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	MILITARY
端子面层：	TIN LEAD	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	15.24 mm
最长写入周期时间 (tWC)：	3 ms	Base Number Matches：	1

5962-8852515XX 数据手册

4.5

Toggle Bit

In addition to DATA Polling the AT28C256 provides another method for determining the end of a

write cycle. During the write operation, successive attempts to read data from the device will

result in I/O6 toggling between one and zero. Once the write has completed, I/O6 will stop tog-

gling and valid data will be read. Reading the toggle bit may begin at any time during the write

cycle.

4.6

Data Protection

If precautions are not taken, inadvertent writes may occur during transitions of the host system

power supply. Atmel has incorporated both hardware and software features that will protect the

memory against inadvertent writes.

4.6.1

Hardware Protection

Hardware features protect against inadvertent writes to the AT28C256 in the following ways: (a)

V_CCsense – if V_CCis below 3.8V (typical) the write function is inhibited; (b) V_CCpower-on delay –

once V_CChas reached 3.8V the device will automatically time out 5 ms (typical) before allowing

a write; (c) write inhibit – holding any one of OE low, CE high or WE high inhibits write cycles;

and (d) noise filter – pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a

write cycle.

4.6.2

Software Data Protection

A software controlled data protection feature has been implemented on the AT28C256. When

enabled, the software data protection (SDP), will prevent inadvertent writes. The SDP feature

may be enabled or disabled by the user; the AT28C256 is shipped from Atmel with SDP

disabled.

SDP is enabled by the host system issuing a series of three write commands; three specific

bytes of data are written to three specific addresses (refer to “Software Data Protection” algo-

rithm). After writing the 3-byte command sequence and after t_WCthe entire AT28C256 will be

protected against inadvertent write operations. It should be noted, that once protected the host

may still perform a byte or page write to the AT28C256. This is done by preceding the data to be

written by the same 3-byte command sequence used to enable SDP.

Once set, SDP will remain active unless the disable command sequence is issued. Power transi-

tions do not disable SDP and SDP will protect the AT28C256 during power-up and power-down

conditions. All command sequences must conform to the page write timing specifications. The

data in the enable and disable command sequences is not written to the device and the memory

addresses used in the sequence may be written with data in either a byte or page write

operation.

After setting SDP, any attempt to write to the device without the 3-byte command sequence will

start the internal write timers. No data will be written to the device; however, for the duration of

t_WC, read operations will effectively be polling operations.

4.7

Device Identification

An extra 64 bytes of EEPROM memory are available to the user for device identification. By rais-

ing A9 to 12V ± 0.5V and using address locations 7FC0H to 7FFFH the additional bytes may be

written to or read from in the same manner as the regular memory array.

4.8

Optional Chip Erase Mode

The entire device can be erased using a 6-byte software code. Please see “Software Chip

Erase” application note for details.

AT28C256

0006M–PEEPR–12/09

1 2 345 6 7...25

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与5962-8852515XX相关器件

型号	品牌	描述	获取价格	数据表
5962-8852515YX	MICROCHIP	EEPROM, 32KX8, 150ns, Parallel, CMOS, CQCC32	获取价格
5962-8852515ZA	ATMEL	EEPROM, 32KX8, 150ns, Parallel, CMOS, CDFP28, BOTTOM BRAZED, CERAMIC, DFP-28	获取价格
5962-8852515ZC	XICOR	EEPROM, 32KX8, 150ns, Parallel, CMOS	获取价格
5962-8852515ZX	MICROCHIP	EEPROM, 32KX8, 150ns, Parallel, CMOS, CDFP28	获取价格
5962-8852516UA	ATMEL	EEPROM, 32KX8, 150ns, Parallel, CMOS, CPGA28, CERAMIC, PGA-28	获取价格
5962-8852516UC	XICOR	EEPROM, 32KX8, 150ns, Parallel, CMOS, CPGA28	获取价格

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