Datasheet > 5962-3826703QNM

5962-3826703QNM

更新时间： 2024-01-03 16:14:37

品牌	Logo	应用领域
麦斯威 - MAXWELL		存储可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
40页	315K
描述
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON

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5962-3826703QNM 技术参数

生命周期：	Obsolete	零件包装代码：	DFP
包装说明：	DFP,	针数：	32
Reach Compliance Code：	compliant	ECCN代码：	3A001.A.2.C
HTS代码：	8542.32.00.51	风险等级：	5.04
Is Samacsys：	N	最长访问时间：	200 ns
其他特性：	100 YEAR DATA RETENTION	数据保留时间-最小值：	100
JESD-30 代码：	R-CDFP-F32	长度：	20.828 mm
内存密度：	1048576 bit	内存集成电路类型：	EEPROM
内存宽度：	8	功能数量：	1
端子数量：	32	字数：	131072 words
字数代码：	128000	工作模式：	SYNCHRONOUS
最高工作温度：	125 °C	最低工作温度：	-55 °C
组织：	128KX8	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	DFP	封装形状：	RECTANGULAR
封装形式：	FLATPACK	并行/串行：	PARALLEL
编程电压：	5 V	认证状态：	Not Qualified
筛选级别：	MIL-STD-883	座面最大高度：	3.1242 mm
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子形式：	FLAT	端子节距：	1.27 mm
端子位置：	DUAL	宽度：	11.049 mm
最长写入周期时间 (tWC)：	10 ms	Base Number Matches：	1

5962-3826703QNM 数据手册

3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the

option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available

onshore at the option of the reviewer.

3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit

group number 41 (see MIL-PRF-38535, appendix A).

3.11 Processing of EEPROMs. All testing requirements and quality assurance provisions herein shall be satisfied by the

manufacturer prior to delivery.

3.11.1 Conditions of the supplied devices. Devices will be supplied in an unprogrammed or clear state. No provision will be

made for supplying programmed devices.

3.11.2 Erasure of EEPROMs. When specified, devices shall be erased in accordance with procedures and characteristics

specified in 4.5.1.

3.11.3 Programming of EEPROMs. When specified, devices shall be programmed in accordance with procedures and

characteristics specified in 4.5.2.

3.11.4 Verification of state of EEPROMs. When specified, devices shall be verified as either written to the specified pattern

or cleared. As a minimum, verification shall consist of performing a read of the entire array to verify that all bits are in the proper

state. Any bit that does not verify to be in the proper state shall constitute a device failure and the device shall be removed from

the lot or sample.

3.11.5 Power supply sequence of EEPROMs. In order to reduce the probability of inadvertant writes, the following power

supply sequences shall be observed.

a. For device types 1-19, a logic high state shall be applied to WE and/or CE at the same time or before the application

of V . For device types 16-19, an additional precaution is available, a logic low state shall be applied to RES at the

same time or before the application of V

b. For device types 1-19, a logic high state shall be applied to WE and/or CE at the same time or before the removal of

. For device types 16-19, an additional precaution is available, a logic low state shall be applied to RES at the

same time or before the removal of V

3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitors. This

reprogrammability test shall be done for initial characterization and after any design or process changes which may affect the

reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of

program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendor's procedure

shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with

test data.

3.13 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall

be done for initial characterization and after any design or process change which may affect data retention. The methods and

procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military

temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request

of the acquiring or preparing activity, along with test data.

SIZE

STANDARD

MICROCIRCUIT DRAWING

5962-38267

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

REVISION LEVEL

SHEET

DSCC FORM 2234

APR 97

1...3 4 567 8 9...40

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与5962-3826703QNM相关器件

型号	品牌	描述	获取价格	数据表
5962-3826703QNQ	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826703QNV	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826703QTM	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826703QTQ	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826703QTV	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826703QUM	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格

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