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54AC16374WD

更新时间： 2024-09-29 22:45:27
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德州仪器 - TI 触发器输出元件
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7页 135K
描述
6-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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54AC16374WD 数据手册

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54AC16374, 74AC16374  
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCAS123B – MARCH 1990 – REVISED APRIL 1996  
54AC16374 . . . WD PACKAGE  
74AC16374 . . . DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
3-State True Outputs  
Full Parallel Access for Loading  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1CLK  
1D1  
1D2  
GND  
1D3  
1D4  
1
48  
47  
46  
45  
44  
43  
42  
Flow-Through Architecture Optimizes  
PCB Layout  
2
3
4
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
5
6
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
V
7
V
CC  
CC  
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
8
41 1D5  
40 1D6  
500-mA Typical Latch-Up Immunity at  
125°C  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
GND  
1D7  
1D8  
2D1  
2D2  
GND  
2D3  
2D4  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) Packages Using  
25-mil Center-to-Center Pin Spacings and  
380-mil Fine-Pitch Ceramic Flat (WD)  
Packages Using 25-mil Center-to-Center  
Pin Spacings  
description  
V
V
CC  
CC  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
2D5  
2D6  
GND  
2D7  
2D8  
2CLK  
The ’AC16374 are 16-bit edge-triggered D-type  
flip-flops with 3-state outputs designed  
specifically for driving highly capacitive or  
relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
The ’AC16374 can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock  
(CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly.  
OE does not affect the internal operations of the flip-flop. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
The 74AC16374 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and  
functionality of standard small-outline packages in the same printed-circuit-board area.  
The 54AC16374 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
74AC16374 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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