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514FACXXXXXXBAGR PDF预览

514FACXXXXXXBAGR

更新时间: 2024-01-22 00:23:12
品牌 Logo 应用领域
芯科 - SILICON 时钟光电二极管外围集成电路
页数 文件大小 规格书
32页 267K
描述
Clock Generator, 125MHz, CMOS, PDSO6, 3.20 X 5 MM, ROHS COMPLIANT PACKAGE-6

514FACXXXXXXBAGR 技术参数

生命周期:Active零件包装代码:SOIC
包装说明:LSON,针数:6
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.7
JESD-30 代码:R-PDSO-N6长度:5 mm
端子数量:6最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:125 MHz
封装主体材料:PLASTIC/EPOXY封装代码:LSON
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE
认证状态:Not Qualified座面最大高度:1.28 mm
最大供电电压:2.75 V最小供电电压:2.25 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:1.27 mm
端子位置:DUAL宽度:3.2 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

514FACXXXXXXBAGR 数据手册

 浏览型号514FACXXXXXXBAGR的Datasheet PDF文件第2页浏览型号514FACXXXXXXBAGR的Datasheet PDF文件第3页浏览型号514FACXXXXXXBAGR的Datasheet PDF文件第4页浏览型号514FACXXXXXXBAGR的Datasheet PDF文件第6页浏览型号514FACXXXXXXBAGR的Datasheet PDF文件第7页浏览型号514FACXXXXXXBAGR的Datasheet PDF文件第8页 
Si514  
Table 3. Output Clock Frequency Characteristics  
VDD = 1.8 V ±5%, 2.5 or 3.3 V ±10%, TA = –40 to +85 oC  
Parameter  
Programmable  
Symbol  
Test Condition  
CMOS  
Min  
0.100  
0.100  
Typ  
Max  
Units  
MHz  
MHz  
ppb  
F
F
212.5  
250  
O
O
Frequency Range  
LVDS/LVPECL/HCSL  
Frequency  
M
0.026  
RES  
Reprogramming  
Resolution  
Frequency Range for  
Small Frequency Change  
(Continuous Glitchless  
Output)  
From center frequency  
–1000  
+1000  
ppm  
Settling time for Small  
Frequency Change  
<±1000 ppm from  
center frequency  
100  
10  
µs  
Settling time for Large  
Frequency Change (Out-  
put Squelched during Fre-  
quency Transition)  
>±1000 ppm from  
center frequency  
ms  
1
2
2
Total Stability  
Frequency Stability Grade C  
Frequency Stability Grade B  
Frequency Stability Grade A  
–30  
–50  
–100  
–20  
–25  
–50  
+30  
+50  
+100  
+20  
+25  
+50  
10  
ppm  
ppm  
ppm  
ppm  
ppm  
ppm  
ms  
Temperature Stability  
Frequency Stability Grade C  
Frequency Stability Grade B  
Frequency Stability Grade A  
Startup Time  
Disable Time  
T
Minimum V until output  
DD  
SU  
frequency (F ) within specification  
O
T
F < 10 MHz  
60  
25  
µs  
µs  
D
O
F 10 MHz  
O
Notes:  
1. Total stability includes initial accuracy, operating temperature, supply voltage change, load change, and shock and  
vibration (not under operation), and 1 year aging at 25 oC.  
2. Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration  
(not under operation), and 10 years aging at 40 oC.  
Preliminary Rev. 0.9  
5

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