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48SD6404RPFI PDF预览

48SD6404RPFI

更新时间: 2024-02-10 06:01:09
品牌 Logo 应用领域
麦斯威 - MAXWELL 内存集成电路动态存储器
页数 文件大小 规格书
42页 595K
描述
256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks

48SD6404RPFI 技术参数

生命周期:Contact Manufacturer零件包装代码:DFP
包装说明:DFP,针数:72
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.24风险等级:5.33
Is Samacsys:N访问模式:FOUR BANK PAGE BURST
最长访问时间:6 ns其他特性:AUTO/SELF REFRESH
JESD-30 代码:R-XDFP-F72长度:26.67 mm
内存密度:268435456 bit内存集成电路类型:SYNCHRONOUS DRAM
内存宽度:4功能数量:1
端口数量:1端子数量:72
字数:67108864 words字数代码:64000000
工作模式:SYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:64MX4
封装主体材料:UNSPECIFIED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
认证状态:Not Qualified座面最大高度:4.16 mm
自我刷新:YES最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:FLAT
端子节距:0.635 mm端子位置:DUAL
宽度:19 mmBase Number Matches:1

48SD6404RPFI 数据手册

 浏览型号48SD6404RPFI的Datasheet PDF文件第6页浏览型号48SD6404RPFI的Datasheet PDF文件第7页浏览型号48SD6404RPFI的Datasheet PDF文件第8页浏览型号48SD6404RPFI的Datasheet PDF文件第10页浏览型号48SD6404RPFI的Datasheet PDF文件第11页浏览型号48SD6404RPFI的Datasheet PDF文件第12页 
48SD6404  
256Mb (16-Meg X 4-Bit X 4-Banks) SDRAM  
Column address strobe and write command (WRIT): This command starts a write operation. When the  
burst write mode is selected, the column address (AY0 to AY9, A11) and the bank select address (BA0/BA1)  
become the burst write start address. When the single write mode is selected, data is only written to the  
location specified by the column address (AY0 to AY9, A11) and bank select address(BA0/BA1).  
Write with auto-precharge (WRIT A): This command automatically performs a precharge operation after a  
burst write with a length of 1, 2, 4, or 8, or after a single write operation.  
Row address strobe and bank activate ( ACTV): This command activates the bank that is selected by  
BA0/BA1 (BS) and determines the row address (AX0 to AX12). When BA0 and BA1 are Low, bank 0 is  
activated. When BA0 is Low, and BA1 is High, bank 1 is activated. When BA0 is High and BA1 is Low, bank  
2 is activated. When BA0 and BA1 are High, bank 3 is activated.  
Precharge select bank (PRE): This command starts precharge operation for the bank selected by BA0/  
BA1. If BA0 and BA1 are Low, bank 0 is selected. If BA0 is Low and BA1 is High, bank 1 is selected. If BA0  
is High and BA1 is Low, bank 2 is selected. If BA0 and BA1 are High, bank 3 is selected.  
Precharge all banks (PALL): This command starts a precharge operation for all banks.  
Refresh (REF/SELF): This command starts the refresh operation. There are two types of refresh  
operations; one is auto-refresh, and the other is self-refresh. For details, refer to the CKE truth table section.  
Mode register set (MRS): The SDRAM has a mode register that defines how it operates. The mode register  
is specified by the address pins (A0 to A12, BA0 andBA1) at the mode register set cycle. For details, refer to  
the mode register configuration. After power on, the contents of the mode register are undefined, execute  
the mode register set command to set up the mode register.  
01.11.05 Rev 2  
All data sheets are subject to change without notice  
9
©2005 Maxwell Technologies  
All rights reserved.  

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