48SD6404RPFE

更新时间： 2024-01-28 22:38:22

品牌	Logo	应用领域
麦斯威 - MAXWELL		动态存储器
页数	文件大小	规格书
42页	595K
描述
256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

48SD6404RPFE 技术参数

生命周期：	Contact Manufacturer	零件包装代码：	DFP
包装说明：	DFP,	针数：	72
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.24	风险等级：	5.33
Is Samacsys：	N	访问模式：	FOUR BANK PAGE BURST
最长访问时间：	6 ns	其他特性：	AUTO/SELF REFRESH
JESD-30 代码：	R-XDFP-F72	长度：	26.67 mm
内存密度：	268435456 bit	内存集成电路类型：	SYNCHRONOUS DRAM
内存宽度：	4	功能数量：	1
端口数量：	1	端子数量：	72
字数：	67108864 words	字数代码：	64000000
工作模式：	SYNCHRONOUS	最高工作温度：	125 °C
最低工作温度：	-55 °C	组织：	64MX4
封装主体材料：	UNSPECIFIED	封装代码：	DFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK
认证状态：	Not Qualified	座面最大高度：	4.16 mm
自我刷新：	YES	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	MILITARY	端子形式：	FLAT
端子节距：	0.635 mm	端子位置：	DUAL
宽度：	19 mm	Base Number Matches：	1

48SD6404RPFE 数据手册

48SD6404

256Mb (16-Meg X 4-Bit X 4-Banks) SDRAM

Pin Functions:

CLK (INPUT PIN): CLK is the master clock input to this pin. The other input signals are referred at CLK rising

edge.

CS (INPUT PIN): When CS is Low, the command input cycle becomes valid. When CS is High, all inputs are

ignored. However, internal operations (bank active, burst operations, etc.) are held.

RAS, CAS AND WE (INPUT PINS): Although these pin names are the same as those of conventional DRAMs,

they function in a different way. These pins define operation commands (read, write, etc.) depending on the

combination of their voltage levels. For details, refer to the command operations section.

A0 ^TOA12 (INPUT PINS): Row address (AX0 to AX12) is determined by A0 to A12 level at the bank active

command cycle CLK rising edge. Column address (AY0 to AY9, A11) is determined by A0 to A9, A11 level at

the read or write command cycle CLK rising edge. And this column address becomes burst access start

address. A10 defines the precharge mode. When A10 = High at the precharge command cycle, all banks

are pre-charged. But when A10 = Low at the precharge command cycle, only the bank that is selected by

BA0/BA1 (BS) is pre charged. For details refer to the command operation section.

BA0/BA1 (^{INPUT PINS}): BA0/BA1 are bank select signals (BS). The memory array of the 48SD6404 is divided

into bank 0, bank 1, bank 2 and bank 3. The 48SD6404 contains 8192-row X 2048-column X 4-bit. If BA0

and BA1 is Low, bank 0 is selected. If BA0 is Low and BA1 is High, bank 1 is selected. If BA0 is High and

BA1 is Low, bank 2 is selected. If BAO is High and BA1 is High, bank 3 is selected.

CKE (^{INPUT PIN}): This pin determines whether or not the next CLK is valid. If CKE is High, the next CLK rising

edge is valid. If CKE is Low, the next CLK rising edge is invalid. This pin is used for power-down mode,

clock suspend mode and self refresh mode.¹

DQM (INPUT PIN): DQM control input/output buffers

Read operation: If DQM is High, the output buffer becomes High-Z. If the DQM is Low, the output buffer

becomes Low-Z. ( The latency of DQM during reading is 2 clock cycles.)

Write operation: If DQM is High, the previous data is held ( the new data is not written). If the DQM is Low,

the data is written. ( The latency of DQM during writing is 0 clock cycles.)

DQ0 TO DQ3 (DQ PINS): Data is input to and output from these pins ( DQ0 to DQ3).

AND V Q (POWER SUPPLY PINS): 3.3V is applied. ( V is for the internal circuit and V Q is for the output

CC CC CC

buffer.)

AND V Q (POWER SUPPLY PINS): Ground is connected. (V is for the internal circuit and V Q is for the

SS SS SS

output buffer.

1. Self Refresh should only be used at temperatures below 70 °C

01.11.05 Rev 2

All data sheets are subject to change without notice

1...4 5 678 9 10...42

下载PDF

与48SD6404RPFE相关器件

型号	品牌	描述	获取价格	数据表
48SD6404RPFH	MAXWELL	256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks	获取价格
48SD6404RPFI	MAXWELL	256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks	获取价格
48SD6404RPFK	MAXWELL	256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks	获取价格
48SM12D	ETC	Analog IC	获取价格
48SM12S	ETC	Analog IC	获取价格
48SM15D	ETC	Analog IC	获取价格

与48SD6404RPFE相关文章

MAX6675资料手册参数详解、引脚配置说明
2024-05-13

10
LM258引脚图及功能介绍、主要参数分析
2024-05-13

5
CD4052资料手册参数详解、引脚配置说明
2024-05-13

7
一文带你了解TPS5430资料手册分析：参数介绍、引脚配置说明
2024-05-13

6

产品中心

服务支持

精选活动

关于我们

帮助中心

48SD6404RPFE

48SD6404RPFE 技术参数

48SD6404RPFE 数据手册

与48SD6404RPFE相关器件

与48SD6404RPFE相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

48SD6404RPFE

48SD6404RPFE 技术参数

48SD6404RPFE 数据手册

与48SD6404RPFE相关器件

与48SD6404RPFE相关文章

您还可以找

您在本页遇到什么问题？