Datasheet > 48IPW

48IPW

更新时间： 2024-01-31 09:45:30

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
34页	1836K
描述
Contains all support circuitry needed for the ADS1148/ADS1248

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技术参数
数据手册

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48IPW 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	unknown	ECCN代码：	EAR99
风险等级：	5.76	开关类型：	PUSHBUTTON SWITCH
Base Number Matches：	1

48IPW 数据手册

Digital Interface

www.ti.com

All of the pins on J4 and J8 are connected with minimal filtering or protection. Use appropriate caution

when handling these pins. Table 1 summarizes the pinouts for analog interfaces J4 and J8.

Table 1. J8/J4: Analog Interface Pinout

Pin Number

J8.1, J4-1

J8.2, J4-2

J8.3, J4-3

J8.4, J4-4

J8.5, J4-5

J8.6, J4-6

J8.7, J4-7

J8.8, J4-8

J8.18

Signal

A0(–)

A0(+)

A1(–)

A1(+)

A2(–)

A2(+)

A3(–)

A3(+)

REF–

Description, ADS1148/ADS1248

AIN0

AIN1

AIN2

AIN3

AIN4

AIN5

AIN6

AIN7

External reference source input (–

side of differential input)

J8.20

REF+

External reference source input (+

side of differential input)

J8.10-16 (even)

J8.15

Unused

AGND

J8.9-19 (odd), J4-9

Analog ground connections

(except J8.15)

Digital Interface

3.1 Serial Data Interface

The ADS1248EVM is designed to easily interface with multiple control platforms. Samtec part numbers

SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual-row, header/socket

combination at J7. This header/socket provides access to the digital control and serial data pins of the

ADC. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating

connector options.

All logic levels on J7 are 3.3V CMOS, except for the I²C™ pins. These pins conform to 3.3V I²C rules.

Table 2 describes the J7 serial interface pins.

Table 2. J7: Serial Interface Pins

Pin No.

J7.1

Pin Name

CNTL

GPIO0

CLKX

DGND

CLKR

GPIO1

FSX

Signal Name

I/O Type

Pullup

High

None

–

Function

J7.2

START

SCLK

J7.3

ADS1248 SPI clock

Digital ground

J7.4

DGND

Unused

In/Out

–

J7.5

J7.6

High

–

Master reset

J7.7

Unused

DRDY

DGND

DIN

–

J7.8

GPIO2

FSR

–

J7.9

Out

In/Out

None

High

J7.10

J7.11

J7.12

DGND

Digital ground

ADS1248 SPI data in

GPIO3

PWRSEL

Selects ±2.5V or +5V

supply

J7.13

J7.14

J7.15

GPIO4

INT

DOUT/DRDY

Unused

Out

–

None

–

ADS1248 data out

DRDY

Out

None

ADS1148EVM, ADS1248EVM, ADS1148EVM-PDK, and ADS1248EVM-PDK

SBAU142B–April 2009–Revised May 2011

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