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4244-51 PDF预览

4244-51

更新时间: 2024-02-10 16:39:49
品牌 Logo 应用领域
PSEMI 开关射频开关光电二极管
页数 文件大小 规格书
7页 251K
描述
SPDT UltraCMOS? RF Switch

4244-51 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.84
Is Samacsys:NJESD-609代码:e3
端子面层:Matte Tin (Sn)Base Number Matches:1

4244-51 数据手册

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Product Specification  
PE4244  
SPDT UltraCMOS™ RF Switch  
Features  
Product Description  
Single +3.0-volt Power Supply  
The PE4244 UltraCMOS™ RF Switch is designed to cover a  
broad range of applications from DC to 3.0 GHz. This switch  
integrates on-board CMOS control logic with a low voltage  
CMOS compatible control input. Using a +3-volt nominal power  
supply voltage, a 1 dB compression point of +27 dBm can be  
achieved. The PE4244 also exhibits excellent isolation of 39 dB  
at 1.0 GHz and is offered in a small 8-lead MSOP package.  
Low Insertion loss: 0.60 dB up to  
2.0 GHz  
High isolation of 39 dB at 1.0 GHz,  
29 dB at 2.0 GHz  
Typical 1 dB compression of +27 dBm  
Single-pin CMOS logic control  
Packaged in 8-lead MSOP  
The PE4244 UltraCMOS™ RF Switch is manufactured in  
Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS  
process, offering the performance of GaAs with the economy  
and integration of conventional CMOS.  
Figure 1. Functional Diagram  
Figure 2. Package Type  
8-lead MSOP  
RFC  
RF1  
RF2  
CMOS  
Control  
Driver  
CTRL  
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 )  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
Operation Frequency1  
DC  
3000  
MHz  
1000 MHz  
2000 MHz  
1000 MHz  
2000 MHz  
1000 MHz  
2000 MHz  
1000 MHz  
2000 MHz  
0.60  
0.60  
39  
0.75  
0.75  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
Insertion Loss  
37  
27  
34  
26  
19  
22  
Isolation – RFC to RF1/RF2  
Isolation – RF1 to RF2  
Return Loss  
29  
36  
28  
20  
25  
‘ON’ Switching Time  
‘OFF’ Switching Time  
Video Feedthrough2  
Input 1 dB Compression  
Input IP3  
CTRL to 0.1 dB final value, 2 GHz  
CTRL to 25 dB isolation, 2 GHz  
200  
90  
15  
27  
ns  
ns  
mVpp  
dBm  
dBm  
2000 MHz  
26  
43  
2000 MHz, 14dBm  
45  
Notes:  
1. Device linearity will begin to degrade below 10 MHz.  
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50  
test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.  
Document No. 70-0103-03 www.psemi.com  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Page 1 of 7  

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