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4066G-P14-R PDF预览

4066G-P14-R

更新时间: 2022-02-26 12:29:42
品牌 Logo 应用领域
友顺 - UTC /
页数 文件大小 规格书
7页 309K
描述
QUAD BILATERAL SWITCH

4066G-P14-R 数据手册

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4066  
CMOS IC  
SPECIAL CONSIDERATIONS  
In applications where separate power sources are used to drive VDD and the signal input, the VDD current capability  
should exceed VDD/RL (RL=effective external load of the UTC 4066 bilateral switches).This provision avoids any  
permanent current flow or clamp action of the VDD supply when power is applied or removed from UTC 4066.  
In certain applications, the external load-resistor current may include both VDD and Signal-line components. To  
avoid drawing VDD current when switch current flows into terminals 1,4,8 or 11,the voltage drop across the  
bidirectional swith must not exceed 0.6V at TA 25°C, or 0.4V at TA >25°C (calculated from RON values shown).  
NO VDD current will flow through RL if the switch current flows into terminals2, 3, 9 or 10.  
AC TEST CIRCUITS AND SWITCHING TIME WAVEFORMS  
tPZL  
tPLZ  
VDD  
VDD  
VDD  
RL  
VC  
VDD  
VDD  
50%  
tPLZ  
50%  
CONTROL  
IN/OUT  
1KΩ  
0V  
0V  
1 OF 4  
tPZL  
VIS=0V  
VOS  
OUT/IN  
VDD  
VDD  
90%  
CL  
50pF  
SWITCHES  
VSS  
10%  
VOL  
VOL  
Fig. 3 tPZL, tPLZ Propagation Delay Time Control to Signal Output  
UNISONIC TECNOLOGIES CO., LTD  
www.unisonic.com.tw  
5 of 7  
QW-R502-009.I  

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