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3335-21

更新时间: 2024-02-17 14:53:54
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PSEMI /
页数 文件大小 规格书
15页 235K
描述
3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications

3335-21 数据手册

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Product Specification  
PE3335  
3000 MHz UltraCMOS™ Integer-N PLL  
for Low Phase Noise Applications  
Product Description  
Features  
Peregrine’s PE3335 is a high performance integer-N PLL  
capable of frequency synthesis up to 3000 MHz. The  
superior phase noise performance of the PE3335 makes it  
ideal for applications such as LMDS / MMDS / WLL  
basestations and demanding terrestrial systems.  
3000 MHz operation  
÷10/11 dual modulus prescaler  
Internal phase detector with  
charge pump  
The PE3335 features a 10/11 dual modulus prescaler,  
counters, phase comparator and a charge pump as shown  
in Figure 1. Counter values are programmable through  
either a serial or parallel interface and can also be directly  
hard wired.  
Serial, parallel or hardwired  
programmable  
Ultra-low phase noise  
Available in 44-lead PLCC and  
7x7 mm 48-lead QFN packages  
The PE3335 Phase Locked-Loop is optimized for terrestrial  
applications. It is manufactured on Peregrine’s  
UltraCMOS™ process, a patented variation of silicon-on-  
insulator (SOI) technology on a sapphire substrate, offering  
the performance of GaAs with the economy and integration  
of conventional CMOS.  
Figure 1. Block Diagram  
Fin  
Fin  
Prescaler  
10/11  
Main  
Counter  
fp  
13  
D(7:0)  
8
Sdata  
Primary  
20-bit  
Latch  
Secon-  
dary  
20-bit  
Latch  
PD_U  
Charge  
Pump  
Phase  
Detector  
20  
20  
20  
CP  
20  
16  
PD_D  
Pre_en  
M(6:0)  
A(3:0)  
R(3:0)  
6
6
fr  
R Counter  
fc  
Document No. 70-0049-02 www.psemi.com  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Page 1 of 15  

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