Datasheet > 存储 > EPROM> 27C256-10E/L

27C256-10E/L

更新时间： 2024-01-12 19:34:07

品牌	Logo	应用领域
美国微芯 - MICROCHIP		存储内存集成电路可编程只读存储器 OTP只读存储器电动程控只读存储器
页数	文件大小	规格书
10页	92K
描述
256K (32K x 8) CMOS EPROM

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27C256-10E/L 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	8 X 13.40 MM, VSOP-28	针数：	28
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.71	风险等级：	5.62
Is Samacsys：	N	最长访问时间：	100 ns
I/O 类型：	COMMON	JESD-30 代码：	R-PDSO-G28
JESD-609代码：	e0	长度：	11.8 mm
内存密度：	262144 bit	内存集成电路类型：	OTP ROM
内存宽度：	8	功能数量：	1
端子数量：	28	字数：	32768 words
字数代码：	32000	工作模式：	ASYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	32KX8	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSOP1
封装等效代码：	TSSOP28,.53,22	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE	并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
编程电压：	13 V	认证状态：	Not Qualified
座面最大高度：	1.2 mm	最大待机电流：	0.0001 A
子类别：	OTP ROMs	最大压摆率：	0.025 mA
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.55 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	8 mm
Base Number Matches：	1

27C256-10E/L 数据手册

27C256

1.3

Standby Mode

1.7

Verify

The standby mode is defined when the CE pin is high

(VIH) and a program mode is not defined.

After the array has been programmed it must be veri-

fied to ensure all the bits have been correctly pro-

grammed. This mode is entered when all the following

conditions are met:

When these conditions are met, the supply current will

drop from 20 mA to 100 µA.

a) VCC is at the proper level,

b) VPP is at the proper VH level,

c) the CE line is high, and

d) the OE line is low.

1.4

Output Enable

This feature eliminates bus contention in multiple bus

microprocessor systems and the outputs go to a high

impedance when the following condition is true:

1.8

Inhibit

• The OE pin is high and the program mode is not

defined.

When programming multiple devices in parallel with dif-

ferent data, only CE need be under separate control to

each device. By pulsing the CE line low on a particular

device, that device will be programmed; all other

devices with CE held high will not be programmed with

the data, although address and data will be available on

their input pins.

1.5

Erase Mode (U.V. Windowed

Versions)

Windowed products offer the ability to erase the mem-

ory array. The memory matrix is erased to the all 1’s

state when exposed to ultraviolet light. To ensure com-

plete erasure, a dose of 15 watt-second/cm²is

required. This means that the device window must be

placed within one inch and directly underneath an ultra-

violet lamp with a wavelength of 2537 Angstroms,

intensity of 12,000µW/cm²for approximately 20 min-

utes.

1.9

Identity Mode

In this mode specific data is output which identifies the

manufacturer as Microchip Technology Inc. and device

type. This mode is entered when Pin A9 is taken to VH

(11.5V to 12.5V). The CE and OE lines must be at VIL.

A0 is used to access any of the two non-erasable bytes

whose data appears on O0 through O7.

1.6

Programming Mode

The Express Algorithm has been developed to improve

on the programming throughput times in a production

environment. Up to ten 100-microsecond pulses are

applied until the byte is verified. No overprogramming

is required. A flowchart of the express algorithm is

shown in Figure 1-3.

Identity

Input

Output

0 O O O O O O O

Programming takes place when:

Manufacturer

Device Type*

VIL

VIH

a) VCC is brought to the proper voltage,

b) VPP is brought to the proper VH level,

c) the OE pin is high, and

* Code subject to change

d) the CE pin is low.

Since the erased state is “1” in the array, programming

of “0” is required. The address to be programmed is set

via pins A0-A14 and the data to be programmed is pre-

sented to pins O0-O7. When data and address are sta-

ble, a low going pulse on the CE line programs that

location.

DS11001N-page 6

2004 Microchip Technology Inc.

1...3 4 567 8 9 10

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