25AA160/25LC160/25C160
16K SPI™ Bus Serial EEPROM
DEVICE SELECTION TABLE
PACKAGE TYPES
PDIP/SOIC
Part
Number
VCC
Range
Max Clock
Frequency
Temp
Ranges
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
25C160
25LC160
25AA160
4.5-5.5V
2.5-5.5V
1.8-5.5V
3 MHz
2 MHz
1 MHz
C,I,E
C,I
C,I
WP
VSS
FEATURES
• Low power CMOS technology
- Write current: 3 mA maximum
- Read current: 500 µA typical
- Standby current: 500 nA typical
• 2048 x 8 bit organization
• 16 byte page
BLOCK DIAGRAM
Status
Register
HV Generator
• Write cycle time: 5ms max.
• Self-timed ERASE and WRITE cycles
• Block write protection
- Protect none, 1/4, 1/2, or all of array
• Built-in write protection
EEPROM
Array
Memory
Control
Logic
X
I/O Control
Logic
- Power on/off data protection circuitry
- Write enable latch
Dec
- Write protect pin
• Sequential read
• High reliability
Page Latches
Y Decoder
- Endurance: 1M cycles (guaranteed)
- Data retention: > 200 years
- ESD protection: > 4000 V
• 8-pin PDIP and SOIC packages
• Temperature ranges supported:
- Commercial (C):
- Industrial (I):
- Automotive (E) (25C160):
SI
SO
CS
SCK
Sense Amp.
R/W Control
HOLD
WP
0°C to +70°C
-40°C to +85°C
-40°C to +125°C
Vcc
Vss
DESCRIPTION
The Microchip Technology Inc. 25AA160/25LC160/
25C160 (25XX160*) are 16K bit serial Electrically Eras-
able PROMs. The memory is accessed via a simple
Serial Peripheral Interface (SPI) compatible serial bus.
The bus signals required are a clock input (SCK) plus
separate data in (SI) and data out (SO) lines. Access to
the device is controlled through a chip select (CS)
input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
chip select, allowing the host to service higher priority
interrupts.
*25XX160 is used in this document as a generic part number for the 25AA160/25LC160/25C160 devices.
SPI is a trademark of Motorola.
1998 Microchip Technology Inc.
DS21231B-page 1