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24LC1025T-E/SN PDF预览

24LC1025T-E/SN

更新时间: 2024-01-06 07:10:02
品牌 Logo 应用领域
美国微芯 - MICROCHIP 存储内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
26页 296K
描述
1024K I2C™ CMOS Serial EEPROM

24LC1025T-E/SN 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:3.90 MM, ROHS COMPLIANT, PLASTIC, SOIC-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51Factory Lead Time:10 weeks
风险等级:1.29其他特性:200 YEARS DATA RETENTION
最大时钟频率 (fCLK):0.4 MHz数据保留时间-最小值:200
耐久性:1000000 Write/Erase CyclesI2C控制字节:1010MDDR
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9 mm内存密度:1048576 bit
内存集成电路类型:EEPROM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:8字数:131072 words
字数代码:128000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
座面最大高度:1.75 mm串行总线类型:I2C
最大待机电流:0.000005 A子类别:EEPROMs
最大压摆率:0.005 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3.9 mm最长写入周期时间 (tWC):5 ms
写保护:HARDWAREBase Number Matches:1

24LC1025T-E/SN 数据手册

 浏览型号24LC1025T-E/SN的Datasheet PDF文件第2页浏览型号24LC1025T-E/SN的Datasheet PDF文件第3页浏览型号24LC1025T-E/SN的Datasheet PDF文件第4页浏览型号24LC1025T-E/SN的Datasheet PDF文件第6页浏览型号24LC1025T-E/SN的Datasheet PDF文件第7页浏览型号24LC1025T-E/SN的Datasheet PDF文件第8页 
24AA1025/24LC1025/24FC1025  
2.3  
Serial Data (SDA)  
2.0  
PIN DESCRIPTIONS  
This is a bidirectional pin used to transfer addresses  
and data into and data out of the device. It is an open-  
drain terminal, therefore, the SDA bus requires a pull-  
up resistor to VCC (typical 10 kfor 100 kHz, 2 kfor  
400 kHz and 1 MHz).  
The descriptions of the pins are listed in Table 2-1.  
TABLE 2-1:  
PIN FUNCTION TABLE  
Name PDIP SOIJ SOIC  
Function  
A0  
A1  
A2  
1
2
3
1
2
3
1
2
3
User Configurable Chip  
Select  
For normal data transfer SDA is allowed to change only  
during SCL low. Changes during SCL high are  
reserved for indicating the Start and Stop conditions.  
User Configurable Chip  
Select  
Non-Configurable Chip  
Select.  
2.4  
Serial Clock (SCL)  
This input is used to synchronize the data transfer from  
and to the device.  
This pin must be hard-  
wired to logical 1 state  
(VCC). Device will not  
operate with this pin left  
floating or held to logical  
0 (VSS).  
2.5  
Write-Protect (WP)  
This pin must be connected to either VSS or VCC. If tied  
to VSS, write operations are enabled. If tied to VCC,  
write operations are inhibited, but read operations are  
not affected.  
VSS  
SDA  
SCL  
WP  
4
5
6
7
8
4
5
6
7
8
4
5
6
7
8
Ground  
Serial Data  
Serial Clock  
Write-Protect Input  
VCC  
+1.7 to 5.5V (24AA1025)  
+2.5 to 5.5V (24LC1025)  
+1.8 to 5.5V (24FC1025)  
2.1  
A0, A1 Chip Address Inputs  
The A0 and A1 inputs are used by the 24XX1025 for  
multiple device operations. The levels on these inputs  
are compared with the corresponding bits in the slave  
address. The chip is selected if the comparison is true.  
Up to four devices may be connected to the same bus  
by using different Chip Select bit combinations. In most  
applications, the chip address inputs A0 and A1 are  
hard-wired to logic ‘0’ or logic ‘1’. For applications in  
which these pins are controlled by a microcontroller or  
other programmable device, the chip address pins  
must be driven to logic ‘0’ or logic ‘1’ before normal  
device operation can proceed.  
2.2  
A2 Chip Address Input  
The A2 input is non-configurable Chip Select. This pin  
must be tied to VCC in order for this device to operate.  
2010 Microchip Technology Inc.  
DS21941G-page 5  

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