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24AA01H-I/ST PDF预览

24AA01H-I/ST

更新时间: 2024-02-07 19:51:30
品牌 Logo 应用领域
美国微芯 - MICROCHIP 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
30页 513K
描述
1K I2C™ Serial EEPROM with Half-Array Write-Protect

24AA01H-I/ST 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:TSSOP, TSSOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.41
最大时钟频率 (fCLK):0.1 MHz数据保留时间-最小值:200
耐久性:1000000 Write/Erase CyclesI2C控制字节:1010XXXR
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:3 mm内存密度:1024 bit
内存集成电路类型:EEPROM内存宽度:8
湿度敏感等级:1功能数量:1
端子数量:8字数:128 words
字数代码:128工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128X8封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:SERIAL峰值回流温度(摄氏度):260
电源:2/5 V认证状态:Not Qualified
反向引出线:NO座面最大高度:1.2 mm
串行总线类型:I2C最大待机电流:0.000001 A
子类别:EEPROMs最大压摆率:0.003 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mm最长写入周期时间 (tWC):5 ms
写保护:HARDWAREBase Number Matches:1

24AA01H-I/ST 数据手册

 浏览型号24AA01H-I/ST的Datasheet PDF文件第5页浏览型号24AA01H-I/ST的Datasheet PDF文件第6页浏览型号24AA01H-I/ST的Datasheet PDF文件第7页浏览型号24AA01H-I/ST的Datasheet PDF文件第9页浏览型号24AA01H-I/ST的Datasheet PDF文件第10页浏览型号24AA01H-I/ST的Datasheet PDF文件第11页 
24AA01H/24LC01BH  
5.2  
Page Write  
5.0  
5.1  
WRITE OPERATION  
Byte Write  
The write control byte, word address and first data byte  
are transmitted to the 24XX01H in the same way as in  
a byte write. However, instead of generating a Stop  
condition, the master transmits up to 8 data bytes to the  
24XX01H, which are temporarily stored in the on-chip  
page buffer and will be written into the memory once  
the master has transmitted a Stop condition. Upon  
receipt of each word, the four lower-order Address  
Pointer bits are internally incremented by ‘1’. The  
higher-order 7 bits of the word address remain  
constant. If the master should transmit more than 8  
words prior to generating the Stop condition, the  
address counter will roll over and the previously  
received data will be overwritten. As with the byte write  
operation, once the Stop condition is received, an  
internal write cycle will begin (Figure 5-2).  
Following the Start condition from the master, the  
device code (4 bits), the block address (3 bits, “don’t  
cares”) and the R/W bit, which is a logic low, is placed  
onto the bus by the master transmitter. This indicates to  
the addressed slave receiver that a byte with a word  
address will follow after it has generated an Acknowl-  
edge bit during the ninth clock cycle. Therefore, the  
next byte transmitted by the master is the word address  
and will be written into the Address Pointer of the  
24XX01H. After receiving another Acknowledge signal  
from the 24XX01H, the master device will transmit the  
data word to be written into the addressed memory  
location. The 24XX01H acknowledges again and the  
master generates a Stop condition. This initiates the  
internal write cycle, and, during this time, the 24XX01H  
will not generate Acknowledge signals (Figure 5-1).  
Note:  
Page write operations are limited to writing  
bytes within single physical page  
a
regardless of the number of bytes  
actually being written. Physical page  
boundaries start at addresses that are  
integer multiples of the page buffer size (or  
‘page size’) and end at addresses that are  
integer multiples of [page size – 1]. If a  
Page Write command attempts to write  
across a physical page boundary, the  
result is that the data wraps around to the  
beginning of the current page (overwriting  
data previously stored there), instead of  
being written to the next page, as might be  
expected. It is therefore necessary for the  
application software to prevent page write  
operations that would attempt to cross a  
page boundary.  
FIGURE 5-1:  
BYTE WRITE  
S
T
A
R
T
S
T
O
P
Bus Activity  
Master  
Control  
Byte  
Word  
Address  
Data  
x
x
x
0
0
0
SDA Line  
1
1
S
P
A
C
K
A
C
K
A
C
K
Block  
Select  
Bits  
Bus Activity  
x= “don’t care”  
FIGURE 5-2:  
PAGE WRITE  
S
S
T
O
P
T
Bus Activity  
Master  
Control  
Byte  
Word  
Address (n)  
A
Data (n)  
Data (n + 1)  
Data (n + 7)  
R
T
x
x x  
SDA Line  
10 10  
0
S
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Block  
Select  
Bits  
Bus Activity  
x= “don’t care”  
DS22104A-page 8  
© 2008 Microchip Technology Inc.  

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