Datasheet > 2096E

2096E

更新时间： 2024-09-29 22:10:47

品牌	Logo	应用领域
莱迪思 - LATTICE		/
页数	文件大小	规格书
11页	144K
描述
In-System Programmable SuperFAST⑩ High Density PLD

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

2096E 数据手册

ispLSI 2096E

In-System Programmable

SuperFAST™ High Density PLD

Features

Functional Block Diagram

• SUPERFAST HIGH DENSITY IN-SYSTEM

PROGRAMMABLE LOGIC

Output Routing Pool (ORP)

C3 C2 C1 C0

— 4000 PLD Gates

— 96 I/O Pins, Six Dedicated Inputs

— 96 Registers

— High Speed Global Interconnect

— Wide Input Gating for Fast Counters, State

Machines, Address Decoders, etc.

— Small Logic Block Size for Random Logic

— 100% Functional/JEDEC Upward Compatible with

ispLSI 2096 Devices

Logic

Array

Global Routing Pool

(GRP)

GLB

• HIGH PERFORMANCE E²CMOS^®TECHNOLOGY

Output Routing Pool (ORP)

— fmax = 180 MHz Maximum Operating Frequency

— tpd = 5.0 ns Propagation Delay

— TTL Compatible Inputs and Outputs

— 5V Programmable Logic Core

0919/2096E

Description

— ispJTAG™ In-System Programmable via IEEE 1149.1

(JTAG) Test Access Port

— User-Selectable 3.3V or 5V I/O Supports Mixed-

Voltage Systems

— PCI Compatible Outputs

— Open-Drain Output Option

— Electrically Erasable and Reprogrammable

— Non-Volatile

— Unused Product Term Shutdown Saves Power

The ispLSI 2096E is a High Density Programmable Logic

Device. The device contains 96 Registers, 96 Universal

I/O pins, six Dedicated Input pins, three Dedicated Clock

Input pins, two dedicated Global OE input pins and a

GlobalRouting Pool(GRP). TheGRPprovidescomplete

interconnectivity between all of these elements. The

ispLSI 2096E features 5V in-system programmability

and in-system diagnostic capabilities. The ispLSI 2096E

offers non-volatile reprogrammability of all logic, as well

as the interconnect to provide truly reconfigurable sys-

tems.

• ispLSI OFFERS THE FOLLOWING ADDED FEATURES

— Increased Manufacturing Yields, Reduced Time-to-

Market and Improved Product Quality

— Reprogram Soldered Devices for Faster Prototyping

The basic unit of logic on the ispLSI 2096E device is the

Generic Logic Block (GLB). The GLBs are labeled A0, A1

.. C7 (see Figure 1). There are a total of 24 GLBs in the

ispLSI 2096E device. Each GLB is made up of four

macrocells. Each GLB has 18 inputs, a programmable

AND/OR/ExclusiveORarray, andfouroutputswhichcan

be configured to be either combinatorial or

registered.Inputs to the GLB come from the GRP and

dedicated inputs. All of the GLB outputs are brought back

into the GRP so that they can be connected to the inputs

of any GLB on the device.

• OFFERS THE EASE OF USE AND FAST SYSTEM

SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY

OF FIELD PROGRAMMABLE GATE ARRAYS

— Complete Programmable Device Can Combine Glue

Logic and Structured Designs

— Enhanced Pin Locking Capability

— Three Dedicated Clock Input Pins

— Synchronous and Asynchronous Clocks

— Programmable Output Slew Rate Control to

Minimize Switching Noise

— Flexible Pin Placement

— Optimized Global Routing Pool Provides Global

Interconnectivity

The device also has 96 I/O cells, each of which is directly

connected to an I/O pin. Each I/O cell can be individually

programmed to be a combinatorial input, output or bi-

directional I/O pin with 3-state control. The signal levels

are TTL compatible voltages and the output drivers can

source 4 mA or sink 8 mA. Each output can be pro-

grammed independently for fast or slow output slew rate

tominimizeoveralloutputswitchingnoise. Byconnecting

• ispDesignEXPERT™ – LOGIC COMPILER AND COM-

PLETE ISP DEVICE DESIGN SYSTEMS FROM HDL

SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING

— Superior Quality of Results

— Tightly Integrated with Leading CAE Vendor Tools

— Productivity Enhancing Timing Analyzer, Explore

Tools, Timing Simulator and ispANALYZER™

— PC and UNIX Platforms

to change without notice.

LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.

Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com

November 1998

2096e_03

12 3 4 5 6 7...11

中文翻译

下载PDF

与2096E相关器件

型号	品牌	获取价格	描述	数据表
2096E_1	LATTICE	获取价格	In-System Programmable SuperFASTâ¢ High Dens
209-6LPS	CTS	获取价格	Slide Dip Switch, 6 Switches, SPST, Latched, 0.1A, 20VDC, Solder Terminal, Through Hole-st
209-6LPSD	CTS	获取价格	Slide Dip Switch, 6 Switches, SPST, Latched, 0.1A, 20VDC, Solder Terminal, Through Hole-st
209-6LPSF	CTS	获取价格	Slide Dip Switch, 6 Switches, SPST, Latched, 0.1A, 20VDC, Solder Terminal, Through Hole-st
209-6LPST	CTS	获取价格	Slide Dip Switch, 6 Switches, SPST, Latched, 0.1A, 20VDC, Solder Terminal, Through Hole-st
209-6LPSTD	CTS	获取价格	Slide Dip Switch, 6 Switches, SPST, Latched, 0.1A, 20VDC, Solder Terminal, Through Hole-st
2096VE	LATTICE	获取价格	3.3V In-System Programmable SuperFAST⑩ High D
2096VL	LATTICE	获取价格	2.5V In-System Programmable SuperFAST⑩ High D
2097-100	BOURNS	获取价格	High-Voltage 2-Electrode Gas Discharge Tube
2097-100-DLF	BOURNS	获取价格	High-Voltage 2-Electrode Gas Discharge Tube

与2096E相关文章

塔塔电子与力积电达成技术转让协议，携手建设印度首座晶圆厂
2024-09-29

28
英特尔震撼发布：128核心256线程的至强6性能核处理器
2024-09-29

23
SK海力士量产12层HBM3E，容量高达36GB
2024-09-27

24
意法半导体传感器驱动Sphere，开启沉浸式电影新时代
2024-09-27

35

产品中心

服务支持

精选活动

关于我们

帮助中心

2096E

2096E 数据手册

与2096E相关器件

与2096E相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

2096E

2096E 数据手册

与2096E相关器件

与2096E相关文章

您还可以找

您在本页遇到什么问题？