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1893BFIT PDF预览

1893BFIT

更新时间: 2024-02-11 14:55:18
品牌 Logo 应用领域
艾迪悌 - IDT 电信光电二极管电信集成电路
页数 文件大小 规格书
138页 1444K
描述
Interface Circuit, 1-Trnsvr, CMOS, PDSO48, 0.300 INCH, SSOP-48

1893BFIT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:0.300 INCH, SSOP-48
针数:48Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.36
数据速率:100000 MbpsJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:15.875 mm
湿度敏感等级:1功能数量:1
端子数量:48收发器数量:1
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP48,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):225
电源:3.3 V认证状态:Not Qualified
座面最大高度:2.8 mm子类别:Network Interfaces
最大压摆率:0.16 mA标称供电电压:3.3 V
表面贴装:YES技术:CMOS
电信集成电路类型:INTERFACE CIRCUIT温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:7.5 mm
Base Number Matches:1

1893BFIT 数据手册

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ICS1893BF Data Sheet - Release  
Table of Contents  
Table of Contents  
Section  
Title  
Page  
Chapter 7  
7.1  
Management Register Set ...............................................................................................49  
Introduction to Management Register Set .............................................................50  
7.1.1  
7.1.2  
7.1.3  
7.1.4  
Management Register Set Outline .........................................................................50  
Management Register Bit Access ..........................................................................51  
Management Register Bit Default Values ..............................................................51  
Management Register Bit Special Functions .........................................................52  
7.2  
Register 0: Control Register ...................................................................................53  
Reset (bit 0.15) ......................................................................................................53  
Loopback Enable (bit 0.14) ....................................................................................54  
Data Rate Select (bit 0.13) .....................................................................................54  
Auto-Negotiation Enable (bit 0.12) .........................................................................54  
Low Power Mode (bit 0.11) ....................................................................................55  
Isolate (bit 0.10) .....................................................................................................55  
Restart Auto-Negotiation (bit 0.9) ..........................................................................55  
Duplex Mode (bit 0.8) .............................................................................................56  
Collision Test (bit 0.7) ............................................................................................56  
IEEE Reserved Bits (bits 0.6:0) .............................................................................56  
7.2.1  
7.2.2  
7.2.3  
7.2.4  
7.2.5  
7.2.6  
7.2.7  
7.2.8  
7.2.9  
7.2.10  
7.3  
Register 1: Status Register ....................................................................................57  
100Base-T4 (bit 1.15) ............................................................................................57  
100Base-TX Full Duplex (bit 1.14) .........................................................................58  
100Base-TX Half Duplex (bit 1.13) ........................................................................58  
10Base-T Full Duplex (bit 1.12) .............................................................................58  
10Base-T Half Duplex (bit 1.11) ............................................................................ 58  
IEEE Reserved Bits (bits 1.10:7) ...........................................................................59  
MF Preamble Suppression (bit 1.6) .......................................................................59  
Auto-Negotiation Complete (bit 1.5) .......................................................................59  
Remote Fault (bit 1.4) ............................................................................................60  
Auto-Negotiation Ability (bit 1.3) ............................................................................60  
Link Status (bit 1.2) ................................................................................................60  
Jabber Detect (bit 1.1) ...........................................................................................61  
Extended Capability (bit 1.0) ..................................................................................61  
7.3.1  
7.3.2  
7.3.3  
7.3.4  
7.3.5  
7.3.6  
7.3.7  
7.3.8  
7.3.9  
7.3.10  
7.3.11  
7.3.12  
7.3.13  
7.4  
Register 2: PHY Identifier Register ........................................................................62  
ICS1893BF, Rev. E, 8/11/09  
August, 2009  
Copyright © 2009, IDT, Inc.  
All rights reserved.  
4

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