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1338BC-31SRI PDF预览

1338BC-31SRI

更新时间: 2024-01-06 18:14:19
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管外围集成电路
页数 文件大小 规格书
23页 427K
描述
Real Time Clock, Non-Volatile, 1 Timer(s), PDSO16, 0.300 INCH, ROHS COMPLIANT, SOIC-16

1338BC-31SRI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.4针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.07
信息访问方法:I2C中断能力:N
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:10.3 mm湿度敏感等级:1
端子数量:16计时器数量:1
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Timer or RTC
最大供电电压:5.5 V最小供电电压:2.45 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
最短时间:SECONDS处于峰值回流温度下的最长时间:30
易失性:NO宽度:7.5 mm
uPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCKBase Number Matches:1

1338BC-31SRI 数据手册

 浏览型号1338BC-31SRI的Datasheet PDF文件第4页浏览型号1338BC-31SRI的Datasheet PDF文件第5页浏览型号1338BC-31SRI的Datasheet PDF文件第6页浏览型号1338BC-31SRI的Datasheet PDF文件第8页浏览型号1338BC-31SRI的Datasheet PDF文件第9页浏览型号1338BC-31SRI的Datasheet PDF文件第10页 
IDT1338B-31  
REAL-TIME CLOCK WITH BATTERY BACKED NON-VOLATILE RAM  
RTC  
logic high being PM. In the 24-hour mode, bit 5 is the second  
10-hour bit (20–23 hours). If the 12/24-hour mode select is  
changed, the hours register must be re-initialized to the new  
format.  
update of the main registers during a read.  
2
On an I C START, the current time is transferred to a second  
set of registers. The time information is read from these  
secondary registers, while the clock continues to run. This  
eliminates the need to re-read the registers in case of an  
Table 4. Control Register (07H)  
The control register controls the operation of the SQW/OUT pin and provides oscillator status.  
Bit #  
Name  
POR  
Bit 7  
OUT  
1
Bit 6  
Bit 5  
OSF  
1
Bit 4  
SQWE  
1
Bit 3  
Bit 2  
Bit 1  
RS1  
1
Bit 0  
RS0  
1
0
0
0
0
0
0
Bit 7: Output Control (OUT). Controls the output level of the SQW/OUT pin when the square-wave output is disabled. If SQWE  
= 0, the logic level on the SQW/OUT pin is 1 if OUT = 1; it is 0 if OUT = 0.  
Bit 5: Oscillator Stop Flag (OSF). A logic 1 in this bit indicates that the oscillator has stopped or was stopped for some time  
period and can be used to judge the validity of the clock and calendar data. This bit is edge triggered, and is set to logic 1 when  
the internal circuitry senses the oscillator has transitioned from a normal run state to a STOP condition. The following are  
examples of conditions that may cause the OSF bit to be set:  
1) The first time power is applied.  
2) The voltage present on VCC and VBAT are insufficient to support oscillation.  
3) The CH bit is set to 1, disabling the oscillator.  
4) External influences on the crystal (i.e., noise, leakage, etc.).  
This bit remains at logic 1 until written to logic 0. This bit can only be written to logic 0. Attempting to write OSF to logic 1 leaves  
the value unchanged.  
Bit 4: Square-Wave Enable (SQWE). When set to logic 1, this bit enables the oscillator output to operate with either VCC or  
VBAT applied. The frequency of the square-wave output depends upon the value of the RS0 and RS1 bits.  
Bits 1 and 0: Rate Select (RS1 and RS0). These bits control the frequency of the square-wave output when the square-wave  
output has been enabled. The table below lists the square-wave frequencies that can be selected with the RS bits.  
Table 5. Square Wave Output  
OUT  
RS1  
RS0  
SQW Output  
1 Hz  
SQWE  
X
X
X
X
0
0
0
1
1
X
X
0
1
0
1
X
X
1
1
1
1
0
0
4.096 kHz  
8.192 kHz  
32.768 kHz  
0
1
1
IDT™ REAL-TIME CLOCK WITH BATTERY BACKED NON-VOLATILE RAM 7  
IDT1338B-31 REV A 112309  

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