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1337GDCGK8 PDF预览

1337GDCGK8

更新时间: 2024-02-18 04:44:01
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路
页数 文件大小 规格书
28页 278K
描述
Real Time Clock, 1 Timer(s), PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8

1337GDCGK8 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.150 INCH, ROHS COMPLIANT, SOIC-8针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.65
最大时钟频率:0.4 MHz信息访问方法:I2C
中断能力:YJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
湿度敏感等级:1位数:8
端子数量:8计时器数量:1
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:2/5 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Timer or RTC
最大供电电压:5.5 V最小供电电压:1.8 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
最短时间:SECONDS处于峰值回流温度下的最长时间:30
宽度:3.9 mmuPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCK
Base Number Matches:1

1337GDCGK8 数据手册

 浏览型号1337GDCGK8的Datasheet PDF文件第1页浏览型号1337GDCGK8的Datasheet PDF文件第2页浏览型号1337GDCGK8的Datasheet PDF文件第3页浏览型号1337GDCGK8的Datasheet PDF文件第5页浏览型号1337GDCGK8的Datasheet PDF文件第6页浏览型号1337GDCGK8的Datasheet PDF文件第7页 
IDT1337G  
REA LTIME CLOCK WITH SERIAL INTERFACE  
RTC  
Typical Operating Circuit  
CRYSTAL  
VCC  
VCC  
VCC  
2k  
2k  
VCC  
10k  
10k  
X1  
X2  
SCL  
SQW/INTB  
CPU  
IDT1337G  
INTA  
SDA  
GND  
Detailed Description  
Communications to and from the IDT1337G occur serially  
over an I C bus. The IDT1337G operates as a slave device  
Effective Load Capacitance  
2
Please see diagram below for effective load capacitance  
calculation. The effective load capacitance (CL) should  
match the recommended load capacitance of the crystal in  
order for the crystal to oscillate at its specified parallel  
resonant frequency with 0ppm frequency error.  
on the serial bus. Access is obtained by implementing a  
START condition and providing a device identification code,  
followed by data. Subsequent registers can be accessed  
sequentially until a STOP condition is executed. The device  
2
is fully accessible through the I C interface whenever VCC  
2
is between 5.5 V and 1.8 V. I C operation is not guaranteed  
when VCC is below 1.8 V. The IDT1337G maintains the time  
and date when VCC is as low as 1.3 V.  
The following sections discuss in detail the Oscillator block,  
2
Clock/Calendar Register Block and Serial I C block.  
Oscillator Block  
Selection of the right crystal, correct load capacitance and  
careful PCB layout are important for a stable crystal  
oscillator. Due to the optimization for the lowest possible  
current in the design for these oscillators, losses caused by  
parasitic currents can have a significant impact on the  
overall oscillator performance. Extra care needs to be taken  
to maintain a certain quality and cleanliness of the PCB.  
Crystal Selection  
The key parameters when selecting a 32 kHz crystal to work  
with IDT1337G RTC are:  
In the above figure, X1 and X2 are the crystal pins of our  
device. Cin1 and Cin2 are the internal capacitors which  
include the X1 and X2 pin capacitance. Cex1 and Cex2 are  
the external capacitors that are needed to tune the crystal  
frequency. Ct1 and Ct2 are the PCB trace capacitances  
between the crystal and the device pins. CS is the shunt  
capacitance of the crystal (as specified in the crystal  
manufacturer's datasheet or measured using a network  
analyzer).  
Recommended Load Capacitance  
Crystal Effective Series Resistance (ESR)  
Frequency Tolerance  
2
IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE  
4
IDT1337G  
REV L 062613  

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