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12061A222PAJ2A PDF预览

12061A222PAJ2A

更新时间： 2024-09-21 20:58:03
品牌 Logo 应用领域
京瓷/艾维克斯 - KYOCERA AVX 电容器
页数 文件大小 规格书
4页 93K
描述
Ceramic Capacitor, Multilayer, Ceramic, 100V, 100% +Tol, 0% -Tol, C0G, 30ppm/Cel TC, 0.0022uF, Surface Mount, 1206, CHIP

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12061A222PAJ2A 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete包装说明：, 1206
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8532.24.00.20风险等级：5.62
电容：0.0022 µF电容器类型：CERAMIC CAPACITOR
介电材料：CERAMICJESD-609代码：e0
安装特点：SURFACE MOUNT多层：Yes
负容差：端子数量：2
最高工作温度：125 °C最低工作温度：-55 °C
封装形状：RECTANGULAR PACKAGE包装方法：TR, EMBOSSED, 7 INCH
正容差：100%额定（直流）电压（URdc）：100 V
尺寸代码：1206表面贴装：YES
温度特性代码：C0G温度系数：-/+30ppm/Cel ppm/ °C
端子面层：Tin/Lead (Sn/Pb) - with Nickel (Ni) barrier端子形状：WRAPAROUND
Base Number Matches：1

12061A222PAJ2A 数据手册

 浏览型号12061A222PAJ2A的Datasheet PDF文件第2页浏览型号12061A222PAJ2A的Datasheet PDF文件第3页浏览型号12061A222PAJ2A的Datasheet PDF文件第4页 
C0G (NP0) Dielectric  
General Specifications  
C0G (NP0) is the most popular formulation of the “tempera-  
ture-compensating,” EIA Class I ceramic materials. Modern  
C0G (NP0) formulations contain neodymium, samarium and  
other rare earth oxides.  
C0G (NP0) ceramics offer one of the most stable capacitor  
dielectrics available. Capacitance change with temperature  
is 0 ±±0ppmꢀ/C which is less than ±0.±ꢁ ∆ C from -55/C  
to +125/C. Capacitance drift or hysteresis for C0G (NP0)  
ceramics is negligible at less than ±0.05ꢁ versus up to  
±2ꢁ for films. ꢂypical capacitance change with life is less  
than ±0.1ꢁ for C0G (NP0), one-fifth that shown by most  
other dielectrics. C0G (NP0) formulations show no aging  
characteristics.  
ꢂhe C0G (NP0) formulation usually has a “Q” in excess  
of 1000 and shows little capacitance or “Q” changes with  
frequency. ꢂheir dielectric absorption is typically less than  
0.6ꢁ which is similar to mica and most films.  
PART NUMBER (see page 2 for complete part number explanation)  
0805  
5
A
101  
J
A
T
2
A
Size  
(L" x W")  
Voltage  
6.±V = 6  
10V = Z  
16V = Y  
25V = ±  
50V = 5  
100V = 1  
200V = 2  
Dielectric  
Capacitance Capacitance  
Failure  
Rate  
Terminations  
ꢂ = Plated Ni  
and Sn  
Packaging  
2 = 7" Reel  
Special  
Code  
A = Std.  
Product  
C0G (NP0) = A Code (In pF)  
2 Sig. Digits +  
Tolerance  
B = ±.10 pꢃ  
C = ±.25 pꢃ  
D = ±.50 pꢃ  
A = Not  
Applicable  
4 = 1±" Reel  
7 = Bulk Cass.  
9 = Bulk  
Number of  
Zeros  
7 = Gold Plated  
Contact  
Factory For  
1 = Pd/Ag Term  
ꢃ = ±1ꢁ (≥ 25 pꢃ)  
G = ±2ꢁ (≥ 1± pꢃ)  
J = ±5ꢁ  
Contact  
Factory  
For  
Multiples  
K = ±10ꢁ  
Temperature Coefficient  
Insulation Resistance vs Temperature  
ꢀ Capacitance vs. Frequency  
10,000  
1,000  
100  
+2  
+1  
Typical Capacitance Change  
Envelope: 0 30 ppm/°C  
+0.5  
0
-1  
-2  
0
-0.5  
0
1KHz  
10 KHz  
100 KHz  
1 MHz  
10 MHz  
-55 -35  
+125  
-15 +5 +25 +45 +65 +85 +105  
40  
60  
80  
100  
0
20  
Frequency  
Temperature °C  
Temperature °C  
Variation of Impedance with Cap Value  
Impedance vs. Frequency  
0805 - C0G (NP0)  
Variation of Impedance with Ceramic Formulation  
Impedance vs. Frequency  
1000 pF - C0G (NP0) vs X7R  
0805  
Variation of Impedance with Chip Size  
Impedance vs. Frequency  
1000 pF - C0G (NP0)  
10 pF vs. 100 pF vs. 1000 pF  
100,000  
10  
10.00  
1206  
0805  
1812  
1210  
X7R  
NPO  
10,000  
1,000  
100  
1.00  
1.0  
0.10  
0.01  
10 pF  
10.0  
0.1  
10  
1.0  
0.1  
100  
1000  
100 pF  
1000 pF  
100  
1000  
10  
Frequency, MHz  
Frequency, MHz  
1
100  
Frequency, MHz  
1000  
10  
4
1234

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