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11LC010-IMS

更新时间： 2024-01-22 23:19:39

品牌	Logo	应用领域
美国微芯 - MICROCHIP		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
44页	801K
描述
1K-16K UNI/O® Serial EEPROM Family Data Sheet

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11LC010-IMS 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOT-23
包装说明：	ROHS COMPLIANT, PLASTIC, SOT-23, 3 PIN	针数：	3
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	Factory Lead Time：	15 weeks
风险等级：	1.27	Is Samacsys：	N
最大时钟频率 (fCLK)：	1 MHz	数据保留时间-最小值：	200
耐久性：	1000000 Write/Erase Cycles	JESD-30 代码：	R-PDSO-G3
JESD-609代码：	e3	长度：	2.9 mm
内存密度：	1024 bit	内存集成电路类型：	EEPROM
内存宽度：	8	湿度敏感等级：	1
功能数量：	1	端子数量：	3
字数：	128 words	字数代码：	128
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	128X8
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TO-236	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	并行/串行：	SERIAL
峰值回流温度（摄氏度）：	260	电源：	3/5 V
认证状态：	Not Qualified	座面最大高度：	1.12 mm
串行总线类型：	1-WIRE	最大待机电流：	0.000005 A
子类别：	EEPROMs	最大压摆率：	0.005 mA
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	2.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子节距：	0.95 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	40	宽度：	1.3 mm
最长写入周期时间 (tWC)：	10 ms	写保护：	SOFTWARE
Base Number Matches：	1

11LC010-IMS 数据手册

11AAXXX/11LCXXX

FIGURE 3-4:

MAK (‘1’)

ACKNOWLEDGE BITS

3.3

Acknowledge

SAK (‘1’)

An Acknowledge routine occurs after each byte is

transmitted, including the start header. This routine

consists of two bits. The first bit is transmitted by the

master, and the second bit is transmitted by the slave.

Note: A MAK must always be transmitted

NoMAK (‘0’)

NoSAK⁽¹⁾

following the start header.

The Master Acknowledge, or MAK, is signified by trans-

mitting a ‘1’, and informs the slave that the current

operation is to be continued. Conversely, a Not

Acknowledge, or NoMAK, is signified by transmitting a

‘0’, and is used to end the current operation (and initiate

the write cycle for write operations).

Note 1: A NoSAK is defined as any sequence that is not a

valid SAK.

3.4

Device Addressing

Note: When a NoMAK is used to end a WRITE

or WRSR instruction, the write cycle is

not initiated if no bytes of data have

been received.

A device address byte is the first byte received from the

master device following the start header. The device

address byte consists of a four-bit family code, for the

11XX this is set as ‘1010’. The last four bits of the

device address byte are the device code, which is

hardwired to ‘0000’ on the 11XXXX0 devices.

The slave Acknowledge, or SAK, is also signified by

transmitting a ‘1’, and confirms proper communication.

However, unlike the NoMAK, the NoSAK is signified by

the lack of a middle edge during the bit period.

The device code on 11XXXX1 devices is hardwired to

‘0001’. This allows both 11XXXX0 and 11XXXX1

devices to be used on the same bus without address

conflicts.

Note: In order to guard against bus contention,

a NoSAK will occur after the start

header.

A NoSAK will occur for the following events:

• Following the start header

FIGURE 3-5:

DEVICE ADDRESS BYTE

ALLOCATION

• Following the device address, if no slave on the

bus matches the transmitted address

MAKSAK

SLAVE ADDRESS

• Following the command byte, if the command is

invalid, including Read, CRRD, Write, WRSR,

SETAL, and ERAL during a write cycle.

0⁽¹⁾

• If the slave becomes out of sync with the master

• If a command is terminated prematurely by using

a NoMAK, with the exception of immediately after

the device address.

Note 1: This bit is a ‘1’ on the 11XXXX1.

3.5

Bus Conflict Protection

See Figure 3.3 and Figure 3-4 for details.

If a NoSAK is received from the slave after any byte

(except the start header), an error has occurred. The

master should then perform a standby pulse and begin

the desired command again.

To help guard against high current conditions arising

from bus conflicts, the 11XX features a current-limited

output driver. The IOL and IOH specifications describe

the maximum current that can be sunk or sourced,

respectively, by the SCIO pin. The 11XX will vary the

output driver impedance to ensure that the maximum

current level is not exceeded.

FIGURE 3-3:

Master

ACKNOWLEDGE

ROUTINE

Slave

SAK

MAK

DS22067H-page 8

Preliminary

 2010 Microchip Technology Inc.

1...5 6 789 10 11...44

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