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11AA160-I/P PDF预览

11AA160-I/P

更新时间: 2024-02-24 14:16:51
品牌 Logo 应用领域
美国微芯 - MICROCHIP 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
38页 571K
描述
1K-16K UNI/O® Serial EEPROM Family Data Sheet

11AA160-I/P 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOT-23
包装说明:TSSOP, TO-236针数:3
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51Factory Lead Time:15 weeks
风险等级:1.23最大时钟频率 (fCLK):1 MHz
数据保留时间-最小值:200耐久性:1000000 Write/Erase Cycles
JESD-30 代码:R-PDSO-G3JESD-609代码:e3
长度:2.9 mm内存密度:16384 bit
内存集成电路类型:EEPROM内存宽度:8
湿度敏感等级:1功能数量:1
端子数量:3字数:2048 words
字数代码:2000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:2KX8封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TO-236
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:SERIAL峰值回流温度(摄氏度):260
电源:2/5 V认证状态:Not Qualified
座面最大高度:1.12 mm串行总线类型:1-WIRE
最大待机电流:0.000005 A子类别:EEPROMs
最大压摆率:0.005 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.8 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:1.3 mm最长写入周期时间 (tWC):10 ms
写保护:SOFTWAREBase Number Matches:1

11AA160-I/P 数据手册

 浏览型号11AA160-I/P的Datasheet PDF文件第4页浏览型号11AA160-I/P的Datasheet PDF文件第5页浏览型号11AA160-I/P的Datasheet PDF文件第6页浏览型号11AA160-I/P的Datasheet PDF文件第8页浏览型号11AA160-I/P的Datasheet PDF文件第9页浏览型号11AA160-I/P的Datasheet PDF文件第10页 
11AAXXX/11LCXXX  
If a command is terminated in any manner other than a  
NoMAK/SAK combination, then the master must per-  
form a standby pulse before beginning a new com-  
mand, regardless of which device is to be selected.  
3.0  
3.1  
BUS CHARACTERISTICS  
Standby Pulse  
When the master has control of SCIO, a standby pulse  
can be generated by holding SCIO high for TSTBY. At  
this time, the 11XX will reset and return to Standby  
mode. Subsequently, a high-to-low transition on SCIO  
(the first low pulse of the header) will return the device  
to the active state.  
Note: After a POR/BOR event occurs, a low-  
to-high transition on SCIO must be gen-  
erated before proceeding with communi-  
cation, including a standby pulse.  
An example of two consecutive commands is shown in  
Figure 3-1. Note that the device address is the same  
for both commands, indicating that the same device is  
being selected both times.  
Once a command is terminated satisfactorily (i.e., via  
a NoMAK/SAK combination during the Acknowledge  
sequence), performing a standby pulse is not required  
to begin a new command as long as the device to be  
selected is the same device selected during the previ-  
ous command. However, a period of TSS must be  
observed after the end of the command and before the  
beginning of the start header. After TSS, the start  
header (including THDR low pulse) can be transmitted  
in order to begin the new command.  
A standby pulse cannot be generated while the slave  
has control of SCIO. In this situation, the master must  
wait for the slave to finish transmitting and to release  
SCIO before the pulse can be generated.  
If, at any point during a command, an error is detected  
by the master, a standby pulse should be generated  
and the command should be performed again.  
FIGURE 3-1:  
CONSECUTIVE COMMANDS EXAMPLE  
Standby Pulse(1)  
Device Address  
Start Header  
SCIO  
0 1 0 1 0 1 0 1  
1 0 1 0 0 0 0 0  
Device Address  
Start Header  
SCIO  
0 1 0 1 0 1 0 1  
1 0 1 0 0 0 0 0  
Note 1: After a POR/BOR event, a low-to-high transition on SCIO is required to occur before the first  
standby pulse.  
When a standby pulse is not required (i.e., between  
successive commands to the same device), a period of  
3.2  
Start Data Transfer  
All operations must be preceded by a start header. The  
start header consists of holding SCIO low for a period  
of THDR, followed by transmitting an 8-bit ‘01010101’  
code. This code is used to synchronize the slave’s  
internal clock period with the master’s clock period, so  
accurate timing is very important.  
TSS must be observed after the end of the command  
and before the beginning of the start header.  
Figure 3-2 shows the waveform for the start header,  
including the required Acknowledge sequence at the  
end of the byte.  
FIGURE 3-2:  
START HEADER  
SCIO  
TSS  
THDR Data ‘0’ Data 1’ Data 0’ Data 1’ Data 0’ Data 1’ Data 0’ Data 1’  
MAK  
NoSAK  
© 2008 Microchip Technology Inc.  
Preliminary  
DS22067E-page 7  

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