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101X15W470MT4U PDF预览

101X15W470MT4U

更新时间: 2023-02-26 14:27:02
品牌 Logo 应用领域
约翰逊 - JOHANSON /
页数 文件大小 规格书
8页 1214K
描述
Ceramic Capacitor, Multilayer, Ceramic, 100V, 20% +Tol, 20% -Tol, X7R, -/+15ppm/Cel TC, 0.000047uF, 0805,

101X15W470MT4U 数据手册

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SOLDER  
P
AD  
0402 (X07)  
IN mm  
R
ECOMMENDATIONS  
0603 (X14)  
IN mm  
0805 (X15)  
IN mm  
1206 (X18)  
IN mm  
1210 (X41)  
IN mm  
1410 (X44)  
IN mm  
1812 (X43)  
IN mm  
Z
X
Y
G
V
0.020 0.51 0.035 0.89 0.050 1.27 0.065 1.65 0.100 2.54 0.100 2.54 0.125 3.18  
0.020 0.51 0.025 0.64 0.035 0.89 0.040 1.02 0.040 1.02 0.040 1.02 0.040 1.02  
0.024 0.61 0.040 1.02 0.050 1.27 0.080 2.03 0.080 2.03 0.100 2.54 0.130 3.30  
0.015 0.38 0.020 0.51 0.022 0.56 0.040 1.02 0.045 1.14 0.045 1.14 0.045 1.14  
0.039 0.99 0.060 1.52 0.080 2.03 0.120 3.05 0.160 4.06 0.160 4.06 0.190 4.83  
0.064 1.63 0.090 2.29 0.120 3.05 0.160 4.06 0.160 4.06 0.180 4.57 0.210 5.33  
Use of solder mask beneath component is not recommended because of flux/contaminant entrapment.  
U
X
V
V
U
Z
Y
G
OPTIMIZING X2Y PERFORMANCE ON THE PCB  
X2Y capacitors deliver excellent performance in EMI/RFI filtering and Power Bypass applications. Physical and electrical placement  
on the PCB is critical in achieving good results. A low inductance, dual ground connection is mandatory.  
EMI Filter Applications Low inductance PCB routing examples are shown in figures 1 and 2. Figures 3-5 show unbalanced and high  
inductance connections and should be avoided. See detailed application note X2Y EMI FIlter Evaluation and PCB Design Guidelines.  
Fig. 1  
Fig. 2  
Fig. 3  
Fig. 4  
Fig. 5  
PDN / Power Bypass Applications Figures on right compare the X2Y  
recommended layout against a poor layout. Because of its long extents from  
device terminals to vias, and the wide via separation, the poor layout exhibits  
approximately 200ꢀ L1 inductance, and 150ꢀ L2 inductance compared to  
recommended X2Y layouts. See detailed application note X2Y Power Bypass  
Recommended X2Y  
Bypass Layout  
Mounting.  
LAB  
EVALUATION  
S
OLDERING  
PRECAUTIONS  
Ceramic capacitors (X2Y and standard MLC types) can be easily damaged when hand soldered. Thermal cracking of the ceramic  
body is often invisible even under a microscope. Factors that increase thermal cracking risk:  
1. 4 terminals to solder can increase hand-soldering time and temperature exposure  
2. Pb-free solders have higher reflow temperatures  
3. Low inductance connections to ground are inherently good heat-sinks  
A damaged component may exhibit a short circuit immediately and not recover, or may operate with intermittent Insulation Resistance  
(IR) levels. If you are not achieving expected results and have followed the other guidelines carefully, check to see you are adhering to  
the soldering guidelines below:  
• Always pre-heat the PCB and component to within 50ꢁC of solder reflow temperature at 2ꢁC/sec. maximum.  
• Use contact-less hand solder tools such as a hot air pencil, IR lamp, etc.  
• Avoid over-heating of the ceramic component, temperature limit: 260ꢁC for 20-30 seconds max.  
• Use a soldering iron as last resort; 20W max. tip, NO CONTACT with ceramic, limit solder time to 5 seconds max.  
A reliable, cost effective prototype PCB reflow soldering process is possible using a household toaster oven. There are several good  
procedures available on-line by googling “Toaster Oven Soldering”  
6
www.johansondielectrics.com  

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