Datasheet > XO57CTEHNA3M6864

XO57CTEHNA3M6864

更新时间： 2023-02-15 00:00:00

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
3页	80K
描述
HCMOS/TTL Output Clock Oscillator,

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数据手册

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XO57CTEHNA3M6864 数据手册

XOSM-57

Vishay Dale

www.vishay.com

Surface Mount Oscillator

FEATURES

• Size: 7.0 x 5.0 x 1.9 (mm)

• Miniature package

• Tri-state enable/disable

• TTL/HCMOS compatible

• Tape and reel

The XOSM-57 series is an ultra miniature package clock

oscillator with dimensions 7.0 mm x 5.0 mm x 1.9 mm. It is

mainly used in portable PC and telecommunication devices

and equipment.

• I_Rre-flow

• 5 V input voltage

• Material categorization: For definitions of compliance

please see www.vishay.com/doc?99912

STANDARD ELECTRICAL SPECIFICATIONS

PARAMETER

SYMBOL

CONDITION

VALUE

1.500 MHz to 100.000 MHz

25 ppm, 50 ppm, 100 ppm

0 ºC to 70 ºC

Frequency range

Frequency stability ⁽¹⁾

F_O

all conditions

Operating temperature range

T_OPR

- 40 ºC to + 85 ºC (option)

- 55 ºC to + 125 ºC

5.0 V 10 ꢀ

Storage temperature range

Power supply voltage

Aging (first year)

T_STG

V_DD

25 ºC 3 ºC

5 ppm

1.500 MHz to 20.000 MHz

20.001 MHz to 50.000 MHz

30.001 MHz to 100.000 MHz

at ¹/₂V_DD

20 mA max.

Supply current

I_DD

35 mA max.

45 mA max.

Output symmetry

Rise/fall time

Sym

t_r/t_f

40 ꢀ/60 ꢀ (45 ꢀ/55 ꢀ option)

10 ns

1.500 MHz to 67.000 MHz

67.001 MHz to 100.000 MHz

3 ns

V_OH

V_OL

90 ꢀ V_DDmin.

Output voltage

10 ꢀ V_DDmax.

1.500 MHz to 67.000 MHz

67.001 MHz to 100.000 MHz

10 TTL or 50 pF max.

15 pF max.

Output load

Start-up time

t_s

10 ms max.

pin 1 = H or open (output active at pin 3)

pin 1 = L (high impedance at pin 3)

Pin 1, tri-state function

Note

(1)

Include: 25 °C tolerance, operating temperature range, input voltage change, aging, load change, shock vibration

DIMENSIONS in inches [millimeters]

0.079

[2.0]

0.055 [1.40]

typ.

PIN CONNECTION

#1 TRI-STATE/NC

#2 GND

#3 OUTPUT

#4 V_DD

0.2 [5.08]

typ.

0.276 0.008

[7.0 0.2]

0.200

[5.08]

0.071

[1.8]

0.165

[4.20]

0.197 0.008

[5.0 0.2]

0.102 [2.60]

typ.

0.047 [1.20]

typ.

0.075 [1.90]

max.

Note

•

A 0.01 μF bypass capacitor should be placed between V_DD(pin 4) and GND (pin 2) to minimize power supply line noise

Revision: 26-Apr-13

Document Number: 35028

For technical questions, contact: frequency@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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