XC9140 (Design Target)
■PIN CONFIGURATION
XC9140
Series
LX
VOUT
5
4
1 LX
GND
NC
6
5
VOUT
2
3
VBAT
CE 4
1
2
3
CE
GND VBAT
USP-6EL
USP-6EL
SOT-25
SOT-25
(BOTTOM VIEW)
(TOP VIEW)
(TOP VIEW)
(BOTTOM VIEW)
* The dissipation pad for the USP-6EL package should be solder-plated in recommended mount
pattern and metal masking so as to enhance mounting strength and heat release.
The mount pattern should be connected to GND pin (No.6).
■ PIN ASSIGNMENT
PIN NUMBER
PIN NAME
FUNCTIONS
USP-6EL SOT-25
1
5
LX
VOUT
VBAT
CE
Switching
Output Voltage
Power Input
Chip Enable
No Connection
Ground
2
3
4
5
6
4
3
1
-
NC
2
GND
■ PIN FUNCTION ASSIGNMEN
PIN NAME
SIGNAL
STATUS
H
Active (All Series)
CE
Stand-by (XC9140A/B Type)
Bypass Mode (XC9140C Type)
L
* Please do not leave the CE pin open.
■ABSOLUTE MAXIMUM RATINGS
PARAMETER
BAT Pin Voltage
LX Pin Voltage
VOUT Pin Voltage
CE Pin Voltage
LX Pin Current
SYMBOL
VBAT
VLX
RATINGS
-0.3 ~ 7.0
-0.3 ~ VOUT + 0.3 or 7.0 (*1)
UNITS
V
V
VOUT
VCE
-0.3 ~ 7.0
V
-0.3 ~ 7.0
V
700
ILX
mA
250
600 (40mm x 40mm Standard board) (*2)
760 (JESD51-7 board) (*2)
120
SOT-25
Power Dissipation
(Ta=25℃)
Pd
mW
USP-6EL
1000 (40mm x 40mm Standard board) (*2)
Operating Ambient Temperature
Storage Temperature
Topr
Tstg
-40 ~ 85
˚C
˚C
-55 ~ 125
* All voltages are described based on the GND.
(*1) The maximum value should be either VOUT+0.3V or 7.0V or in the lowest.
(*2) This power dissipation figure shown is PCB mounted and is for reference only.
The mounting condition is please refer to PACKAGING INFORMATION
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