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X93254UV14I-3 PDF预览

X93254UV14I-3

更新时间: 2024-01-14 15:50:48
品牌 Logo 应用领域
英特矽尔 - INTERSIL 电位器
页数 文件大小 规格书
10页 208K
描述
Dual Digitally Controlled Potentiometers

X93254UV14I-3 技术参数

生命周期:Transferred包装说明:TSSOP-14
Reach Compliance Code:unknown风险等级:5.82
控制接口:INCREMENT/DECREMENT转换器类型:DIGITAL POTENTIOMETER
JESD-30 代码:R-PDSO-G14长度:5 mm
功能数量:1位置数:32
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH认证状态:Not Qualified
电阻定律:LINEAR最大电阻器端电压:3 V
最小电阻器端电压:座面最大高度:1.05 mm
标称供电电压:3 V表面贴装:YES
技术:CMOS标称温度系数:35 ppm/ °C
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
标称总电阻:50000 Ω宽度:4.4 mm
Base Number Matches:1

X93254UV14I-3 数据手册

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X93254  
®
Data Sheet  
March 1, 2005  
FN8186.0  
DESCRIPTION  
Dual Digitally Controlled Potentiometers  
(XDCPs™)  
The Intersil X93254 is a dual digitally controlled poten-  
tiometer (XDCP). The device consists of two resistor  
arrays, wiper switches, a control section, and nonvola-  
tile memory. The wiper positions are controlled by indi-  
vidual Up/Down interfaces.  
FEATURES  
• Dual solid-state potentiometers  
• Independent Up/Down interfaces  
• 32 wiper tap points per potentiometer  
—Wiper position stored in nonvolatile memory  
and recalled on power-up  
• 31 resistive elements per potentiometer  
—Temperature compensated  
—Maximum resistance tolerance of ± 30%  
A potentiometer is implemented by a resistor array  
composed of 31 resistive elements and a wiper switch-  
ing network. The position of each wiper element is  
controlled by a set of independent CS, U/D, and INC  
inputs. The position of the wiper can be stored in non-  
volatile memory and then be recalled upon a subse-  
quent power-up operation.  
—Terminal voltage, 0 to V  
• Low power CMOS  
CC  
—V  
= 3V±10%  
Each potentiometer is connected as a two-terminal  
variable resistor and can be used in a wide variety of  
applications including:  
CC  
—Active current, 250µA max  
—Standby current, 1µA max  
• High reliability  
—Endurance 200,000 data changes per bit  
—Register data retention, 100 years  
– Bias and Gain control  
– LCD Contrast Adjustment  
• R  
value = 50kΩ  
TOTAL  
• 14-lead TSSOP package  
BLOCK DIAGRAM  
V
(Supply Voltage)  
CC  
R
H1  
30K  
30K  
Up/Down  
(U/D )  
1
R
L1  
Control  
and  
Memory  
Increment  
(INC )  
1
R
H2  
Device Select  
(CS )  
1
Up/Down  
(U/D )  
2
R
L2  
Control  
and  
Memory  
Increment  
(INC )  
2
Device Select  
(CS )  
2
V
(Ground)  
SS  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

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