Datasheet > X9400WB24-2.7

X9400WB24-2.7

更新时间： 2023-02-15 00:00:00

品牌	Logo	应用领域
XICOR		/
页数	文件大小	规格书
22页	554K
描述
Digital Potentiometer, 4 Func, 10000ohm, 3-wire Serial Control Interface, 64 Positions, CMOS, BUMP, CSP-24

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X9400WB24-2.7 数据手册

APPLICATION NOTES

A V A I L A B L E

AN99 • AN115 • AN120 • AN124 • AN133 • AN134 • AN135

Low Noise/Low Power/SPI Bus

X9400

Quad Digitally Controlled Potentiometers (XDCP^™)

FEATURES

DESCRIPTION

• Four potentiometers per package

• 64 resistor taps

The X9400 integrates four digitally controlled

potentiometers (XDCPs) on a monolithic CMOS

integrated circuit.

• SPI serial interface for write, read, and transfer

operations of the potentiometer

• Wiper resistance, 40Ω typical at 5V.

• Four non-volatile data registers for each

potentiometer

• Non-volatile storage of multiple wiper position

• Power on recall. Loads saved wiper position on

power up.

The digitally controlled potentiometer is implemented

using 63 resistive elements in a series array. Between

each element are tap points connected to the wiper

terminal through switches. The position of the wiper on

the array is controlled by the user through the SPI

serial bus interface. Each potentiometer has

associated with it a volatile Wiper Counter Register

(WCR) and four nonvolatile Data Registers (DR0-3)

that can be directly written to and read by the user.

The contents of the WCR controls the position of the

wiper on the resistor array through the switches.

Power up recalls the contents of DR0 to the WCR.

• Standby current < 1µA max

• System V : 2.7V to 5.5V operation

• Analog V⁺/V^–: -5V to +5V

• 10KΩ, 2.5KΩ End to end resistance

• 100 yr. data retention

• Endurance: 100,000 data changes per bit per

• Low power CMOS

The XDCP can be used as a three-terminal

potentiometer or as a two-terminal variable resistor in

a wide variety of applications including control,

parameter adjustments, and signal processing.

• 24-lead SOIC, 24-lead TSSOP, and 24-lead CSP

(Chip Scale Package) packages

BLOCK DIAGRAM

Pot 0

R0 R1

R2 R3

R0 R1

R2 R3

H0 H0

V+

V-

Wiper

Counter

(WCR)

Wiper

Counter

(WCR)

H2 H2

Resistor

Array

Pot 2

L0 L0

HOLD

L2 L2

SCK

W0 W0

W2 W2

Interface

and

Control

Circuitry

W1 W1

Data

W3 W3

R0 R1

R2 R3

R0 R1

R2 R3

Wiper

Counter

(WCR)

H1 H1

Resistor

Array

Pot 1

Wiper

Counter

(WCR)

H3 H3

Resistor

Array

Pot 3

L1 L1

L3 L3

Characteristics subject to change without notice. 1 of 22

REV 1.1.8 3/31/04

www.xicor.com

12 3 4 5 6 7...22

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