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X9261TV24-2.7T1 PDF预览

X9261TV24-2.7T1

更新时间： 2023-03-15 00:00:00
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管转换器电阻器
页数 文件大小 规格书
21页 483K
描述
DUAL 100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24, 4.40 MM, PLASTIC, MO-153, TSSOP-24

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X9261TV24-2.7T1 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP,
针数：24Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.8其他特性：NONVOLATILE MEMORY
控制接口：3-WIRE SERIAL转换器类型：DIGITAL POTENTIOMETER
JESD-30 代码：R-PDSO-G24JESD-609代码：e0
长度：7.8 mm湿度敏感等级：2
功能数量：2位置数：256
端子数量：24最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：240
认证状态：Not Qualified电阻定律：LINEAR
最大电阻容差：20%最大电阻器端电压：2.7 V
最小电阻器端电压：座面最大高度：1.2 mm
标称供电电压：2.7 V表面贴装：YES
技术：CMOS标称温度系数：300 ppm/ °C
温度等级：COMMERCIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
标称总电阻：100000 Ω宽度：4.4 mm
Base Number Matches：1

X9261TV24-2.7T1 数据手册

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X9261  
®
Single Supply/Low Power/256-Tap/SPI Bus  
Data Sheet  
April 13, 2005  
FN8171.3  
DESCRIPTION  
Dual Digitally-Controlled (XDCP™)  
Potentiometers  
The X9261 integrates  
potentiometer (XDCP) on  
integrated circuit.  
2
digitally controlled  
monolithic CMOS  
a
FEATURES  
• Dual–Two Separate Potentiometers  
• 256 Resistor Taps/pot–0.4% Resolution  
• SPI Serial Interface for Write, Read, and Transfer  
Operations of the Potentiometer Single Supply  
Device  
The digital controlled potentiometer is implemented  
using 255 resistive elements in a series array.  
Between each element are tap points connected to the  
wiper terminal through switches. The position of the  
wiper on the array is controlled by the user through the  
SPI bus interface. Each potentiometer has associated  
with it a volatile Wiper Counter Register (WCR) and  
four non-volatile Data Registers that can be directly  
written to and read by the user. The contents of the  
WCR controls the position of the wiper on the resistor  
array though the switches. Powerup recalls the  
contents of the default Data Register (DR0) to the  
WCR.  
• Wiper Resistance, 100Ω typical @ V  
• 4 Nonvolatile Data Registers for Each  
Potentiometer  
= 5V  
CC  
• Nonvolatile Storage of Multiple Wiper Positions  
• Power-on Recall Loads Saved Wiper Position on  
Power-up.  
• Standby Current < 5µA Max  
• 50kΩ, 100kΩ Versions of End to End Resistance  
• 100 yr. Data Retention  
• Endurance: 100,000 Data Changes per Bit per  
Register  
• 24 Ld SOIC, 24 Ld TSSOP  
The XDCP can be used as a three-terminal  
potentiometer or as a two terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
• Low Power CMOS  
• Power Supply V  
• Pb-Free Plus Anneal Available (RoHS Compliant)  
= 2.7V to 5.5V  
CC  
FUNCTIONAL DIAGRAM  
V
R
R
H1  
CC  
H0  
Write  
Read  
Address  
Data  
Status  
Transfer  
Inc/Dec  
Power-on Recall  
Bus  
SPI  
Bus  
Interface  
Wiper Counter  
Register (WCR)  
Interface  
and Control  
Data Registers  
(DR0-DR3)  
Control  
V
R
R
R
R
L1  
SS  
W0  
L0  
W1  
50kΩ or 100kΩ versions  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
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