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X79001V20I PDF预览

X79001V20I

更新时间: 2024-01-12 12:53:34
品牌 Logo 应用领域
瑞萨 - RENESAS 输入元件光电二极管转换器
页数 文件大小 规格书
18页 681K
描述
SERIAL INPUT LOADING, 6us SETTLING TIME, 12-BIT DAC, PDSO20, PLASTIC, TSSOP-20

X79001V20I 技术参数

生命周期:Transferred包装说明:PLASTIC, TSSOP-20
Reach Compliance Code:unknown风险等级:5.82
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:SERIALJESD-30 代码:R-PDSO-G20
长度:6.5 mm最大线性误差 (EL):0.2441%
位数:12功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH认证状态:Not Qualified
座面最大高度:1.2 mm标称安定时间 (tstl):6 µs
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

X79001V20I 数据手册

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DATASHEET  
X79000, X79001, X79002  
NV DAC with Selectable Output Range and Memory  
FN8147  
Rev 0.00  
March 17, 2005  
FEATURES  
DESCRIPTION  
• 12-Bit Resolution  
The X79000 is a family of Single Channel Non-Volatile  
(NV) Digital-to-Analog Converters with integrated  
voltage reference, configurable output buffer, general  
purpose EEPROM, and selectable full scale and zero  
offset voltages.  
• Selectable full scale and zero scale voltages  
• Optional External full scale and zero scale  
references  
• Programmable, non-volatile DAC initial value  
register  
The X79000 series implements an SPI serial bus  
interface with slave address identification allowing up  
to 32 devices on some options. The full scale and  
zero scale voltages and the DAC initial value register  
can be set via the SPI bus interface. Optional pins  
are provided for Up/Down style interface allowing for  
increment and decrement of the DAC register in 1, 4,  
or 16 steps at a time.  
• Optional UP/DOWN interface  
• Guaranteed Monotonic Operation, <0.5LSB DNL  
• Buffered Output Option  
• Integrated Voltage Reference Option  
• Voltage Reference Output (1.21V) Option  
• 6 µs settling time, full scale  
• SPI interface, 5MHz  
• Up to 5 slave Address Pins  
• Power-up recall and ready output  
• 56 Bytes of general purpose EEPROM  
• Asynchronous clear pin and control bit  
A Power-on Recall circuit is implemented to keep the  
DAC output at high impedance on power-up and to load  
an initial user defined value from non-volatile memory. A  
power-up ready signal is provided to alert the system to  
begin operations.  
• V = 5V ±10%  
CC  
• 20-lead TSSOP  
• NV DAC  
Additional general purpose non-volatile memory (56  
Bytes) is provided for curve-fit profile setting, signal  
conditioning parameters, or device and system  
indentification.  
X79000 FUNCTIONAL DIAGRAM  
Vcc  
Vss  
VH VL  
Vout  
OE  
Variable Gain  
& Level Shift  
Voltage  
Reference  
DAC  
Core  
Vref  
+
Vbuf  
Variable Gain  
& Level Shift  
Power-up  
Logic  
RDY  
VFB  
General  
Purpose  
EEPROM  
Serial  
Interface  
and  
Control  
Logic  
DAC Register  
A[2:0]  
SCK  
SO  
CLR  
DAC Initial  
Value Register  
DAC Shift  
Register  
SI  
UP  
CS  
DOWN  
FN8147 Rev 0.00  
March 17, 2005  
Page 1 of 18  

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