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X4163V8IZ-4.5A PDF预览

X4163V8IZ-4.5A

更新时间: 2024-01-06 11:26:51
品牌 Logo 应用领域
英特矽尔 - INTERSIL 监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
22页 352K
描述
CPU Supervisor with 16K EEPROM

X4163V8IZ-4.5A 数据手册

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X4163, X4165  
Figure 4. V  
Programming Sequence  
TRIP  
VTRIP Programming  
Execute  
Reset VTRIP  
Sequence  
Set VCC = VCC Applied =  
Desired VTRIP  
New VCC Applied =  
Old VCC Applied + Error  
New VCC Applied =  
Old VCC Applied - Error  
Execute  
Set VTRIP  
Sequence  
Execute  
Reset VTRIP  
Sequence  
Apply 5V to VCC  
Decrement VCC  
(VCC = VCC - 50mV)  
NO  
RESET pin  
goes active?  
YES  
Error –Emax  
Error Emax  
Measured VTRIP  
Desired VTRIP  
-
–Emax < Error < Emax  
DONE  
Emax = Maximum Allowed VTRIP Error  
Control Register  
The user must issue a stop after sending this byte to  
the register to initiate the nonvolatile cycle that stores  
WD1, and WD0. The X4163, X4165 will not acknowl-  
edge any data bytes written after the first byte is  
entered.  
The Control Register provides the user a mechanism  
for changing the Block Lock and Watchdog Timer set-  
tings. The Block Lock and Watchdog Timer bits are  
nonvolatile and do not change when power is  
removed.  
The state of the Control Register can be read at any  
time by performing a random read at address FFFFh.  
Only one byte is read by each register read operation.  
The X4163, X4165 resets itself after the first byte is  
The Control Register is accessed at address FFFFh. It  
can only be modified by performing a byte write opera-  
tion directly to the address of the register and only one  
data byte is allowed for each register write operation.  
Prior to writing to the Control Register, the WEL and  
RWEL bits must be set using a two step process, with  
the whole sequence requiring 3 steps. See "Writing to  
the Control Register" below.  
FN8120.1  
May 12, 2006  
7

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