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X4163S8Z-2.7 PDF预览

X4163S8Z-2.7

更新时间: 2024-01-17 18:45:26
品牌 Logo 应用领域
英特矽尔 - INTERSIL 光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
22页 352K
描述
CPU Supervisor with 16K EEPROM

X4163S8Z-2.7 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.69
Is Samacsys:N其他特性:RESET THRESHOLD VOLTAGE IS 2.92V
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9022 mm信道数量:1
功能数量:1端子数量:8
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.7272 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9116 mmBase Number Matches:1

X4163S8Z-2.7 数据手册

 浏览型号X4163S8Z-2.7的Datasheet PDF文件第16页浏览型号X4163S8Z-2.7的Datasheet PDF文件第17页浏览型号X4163S8Z-2.7的Datasheet PDF文件第18页浏览型号X4163S8Z-2.7的Datasheet PDF文件第19页浏览型号X4163S8Z-2.7的Datasheet PDF文件第20页浏览型号X4163S8Z-2.7的Datasheet PDF文件第21页 
X4163, X4165  
Thin Shrink Small Outline Plastic Packages (TSSOP)  
M8.173  
N
8 LEAD THIN SHRINK NARROW BODY SMALL OUTLINE  
PLASTIC PACKAGE  
INDEX  
AREA  
0.25(0.010)  
M
B M  
E
E1  
-B-  
INCHES  
MIN  
MILLIMETERS  
GAUGE  
PLANE  
SYMBOL  
MAX  
0.047  
0.006  
0.051  
0.0118  
0.0079  
0.120  
0.177  
MIN  
-
MAX  
1.20  
0.15  
1.05  
0.30  
0.20  
3.05  
4.50  
NOTES  
A
A1  
A2  
b
-
-
1
2
3
0.002  
0.031  
0.0075  
0.0035  
0.116  
0.169  
0.05  
0.80  
0.19  
0.09  
2.95  
4.30  
-
L
0.25  
0.010  
-
0.05(0.002)  
SEATING PLANE  
A
9
-A-  
D
c
-
D
3
-C-  
α
E1  
e
4
A2  
e
A1  
0.026 BSC  
0.65 BSC  
-
c
b
0.10(0.004)  
E
0.246  
0.256  
6.25  
0.45  
6.50  
0.75  
-
0.10(0.004) M  
C
A M B S  
L
0.0177  
0.0295  
6
N
8
8
7
NOTES:  
0o  
8o  
0o  
8o  
-
α
1. These package dimensions are within allowable dimensions of  
JEDEC MO-153-AC, Issue E.  
Rev. 1 12/00  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.15mm  
(0.006 inch) per side.  
4. Dimension “E1” does not include interlead flash or protrusions. Inter-  
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per  
side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “b” does not include dambar protrusion. Allowable dambar  
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimen-  
sion at maximum material condition. Minimum space between protru-  
sion and adjacent lead is 0.07mm (0.0027 inch).  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact. (Angles in degrees)  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN8120.1  
May 12, 2006  
22  

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