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X1240V8I PDF预览

X1240V8I

更新时间: 2024-01-12 11:48:38
品牌 Logo 应用领域
XICOR 计时器或实时时钟微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
19页 78K
描述
Real Time Clock/Calendar with EEPROM

X1240V8I 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:PLASTIC, TSSOP-8Reach Compliance Code:unknown
风险等级:5.8Is Samacsys:N
最大时钟频率:0.032 MHz信息访问方法:I2C
中断能力:NJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.4 mm
端子数量:8计时器数量:
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源:3 V
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Timer or RTC最大供电电压:3.6 V
最小供电电压:2.7 V标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL最短时间:SECONDS
易失性:NO宽度:3 mm
uPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCKBase Number Matches:1

X1240V8I 数据手册

 浏览型号X1240V8I的Datasheet PDF文件第1页浏览型号X1240V8I的Datasheet PDF文件第2页浏览型号X1240V8I的Datasheet PDF文件第4页浏览型号X1240V8I的Datasheet PDF文件第5页浏览型号X1240V8I的Datasheet PDF文件第6页浏览型号X1240V8I的Datasheet PDF文件第7页 
X1240  
the clock on the ACK bit prior to RTC data output) into  
a separate latch to avoid time changes during the read  
operation. The clock continues to run.  
The CCR is divided into 3 sections. These are:  
1. Control (2 bytes)  
2. Real Time Clock (8 bytes)  
3. Status (1 byte)  
Writing to the Real Time Clock  
The time and date may be set by writing to the RTC  
registers. To avoid changing the current time by an  
uncompleted write operation, the current time value is  
loaded into a seperate buffer at the falling edge of the  
clock on the ACK bit before the RTC data input bytes,  
the clock continues to run. The new serial input data  
replaces the values in the buffer. This new RTC value  
is loaded back into the RTC Register by a stop bit at  
the end of a valid write sequence. An invalid write  
operation aborts the time update procedure and the  
contents of the buffer are discarded. After a valid write  
operation the RTC will reflect the newly loaded data  
beginning with the first “one second” clock cycle after  
the stop bit. The RTC continues to update the time  
while an RTC register write is in progress and the RTC  
continues to run during any nonvolatile write sequences.  
A single byte may be written to the RTC without affect-  
ing the other bytes.  
Sections 1) and 2) are nonvolatile and Section 3) is  
volatile. Each register is read and written through buff-  
ers. The non-volatile portion (or the counter portion of  
the RTC) is updated only if RWEL is set and only after  
a valid write operation and stop bit. A sequential read or  
page write operation provides access to the contents  
of only one section of the CCR per operation. Access  
to another section requires a new operation. Contin-  
ued reads or writes, once reaching the end of a sec-  
tion, will wrap around to the start of the section. A read  
or page write can begin at any address in the CCR.  
Section 3) is a volatile register. It is not necessary to set  
the RWEL bit prior to writing the status register. Section 3)  
supports a single byte read or write only. Continued reads  
or writes from this section terminates the operation.  
The state of the CCR can be read by performing a ran-  
dom read at any address in the CCR at any time. This  
returns the contents of that register location. Additional  
registers are read by performing a sequential read.  
The read instruction latches all Clock registers into a  
buffer, so an update of the clock does not change the  
time being read. A sequential read of the CCR will not  
result in the output of data from the memory array. At  
the end of a read, the master supplies a stop condition  
to end the operation and free the bus. After a read of  
the CCR, the address remains at the previous address  
+1 so the user can execute a current address read of  
the CCR and continue reading the next Register.  
CLOCK/CONTROL REGISTERS (CCR)  
The Control/Clock Registers are located in an area  
logically separated from the array and are only acces-  
sible following a slave byte of “1101111x” and reads or  
writes to addresses [0000h:003Fh].  
CCR access  
The contents of the CCR can be modified by performing  
a byte or a page write operation directly to any address in  
the CCR. Prior to writing to the CCR (except the status  
register), however, the WEL and RWEL bits must be  
set using a two step process (See section “Writing to  
the Clock/Control Registers.”)  
3

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