Datasheet > WD512K32NV-15G2UIA

WD512K32NV-15G2UIA

更新时间： 2024-02-01 08:09:57

品牌	Logo	应用领域
WEDC		静态存储器
页数	文件大小	规格书
7页	292K
描述
512Kx32 SRAM 3.3V MULTICHIP PACKAGE

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中文翻译

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数据手册

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WD512K32NV-15G2UIA 数据手册

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WS512K32V-XXX

White Electronic Designs

512Kx32 SRAM 3.3V MULTICHIP PACKAGE

FEATURES

ꢀ

Access Times of 15, 17, 20ns

Low Voltage Operation

Packaging

ꢀ

Low Power CMOS

TTL Compatible Inputs and Outputs

Fully Static Operation:

• 66-pin, PGA Type, 1.075 inch square, Hermetic

Ceramic HIP (Package 400)

• No clock or refresh required.

Three State Output.

ꢀ

• 68 lead, 22.4mm (0.880 inch) CQFP, (G2U),

3.56mm (0.140"), (Package 510)

Built-in Decoupling Caps and Multiple Ground Pins

for Low Noise Operation

ꢀ

Organized as 512Kx32; User Conﬁgurable as

2x512Kx16 or 4x512Kx8

ꢀ

Weight

WS512K32V-XG2UX - 8 grams typical

WS512K32NV-XH1X - 13 grams typical

Commercial, Industrial and Military Temperature

Ranges

Low Voltage Operation:

* This product is subject to change without notice.

• 3.3V 10ꢀ Power Supply

PIN CONFIGURATION FOR WS512K32NV-XH1X

Top View Pin Description

I/O_0-31

A_0-18

Data Inputs/Outputs

Address Inputs

Write Enables

Chip Selects

Output Enable

Power Supply

Ground

I/O8

I/O9

I/O10

A13

WE2#

CS²#

GND

I/O¹¹

A10

I/O15

I/O24

I/O25

I/O26

VCC

CS4#

WE⁴#

I/O²⁷

I/O31

I/O30

I/O29

I/O28

WE_1-4

I/O14

I/O13

I/O12

OE#

A¹⁸

CS_1-4

OE#

V_CC

GND

Not Connected

A14

A15

A11

Block Diagram

A16

A12

WE1#

I/O⁷

A⁸

WE₁# CS₁#

WE₂# CS₂#

WE₃# CS₃#

WE₄# CS₄#

OE#

A_0-18

A17

VCC

WE3#

CS³#

GND

I/O¹⁹

I/O23

I/O22

I/O21

I/O20

I/O0

I/O1

I/O2

CS1#

I/O6

I/O16

I/O17

I/O18

512K x 8

I/O5

I/O³

I/O4

I/O_0-7

I/O_8-15

I/O_16-23

I/O_24-31

M a r c h 2 0 0 6

Rev. 12

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

12 3 4 5 6 7

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