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WCR1206-3K9FI PDF预览

WCR1206-3K9FI

更新时间: 2024-01-14 05:02:33
品牌 Logo 应用领域
其他 - ETC 电阻器
页数 文件大小 规格书
3页 424K
描述
General Purpose Surface Mounted Resistors

WCR1206-3K9FI 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active包装说明:SMT, 1206
Reach Compliance Code:compliantECCN代码:EAR99
风险等级:0.69Is Samacsys:N
构造:RectangularJESD-609代码:e3
安装特点:SURFACE MOUNT端子数量:2
最高工作温度:155 °C最低工作温度:-55 °C
封装高度:0.55 mm封装长度:3.1 mm
封装形式:SMT封装宽度:1.55 mm
包装方法:TR, Paper, 7 Inch额定功率耗散 (P):0.25 W
额定温度:70 °C电阻:3900 Ω
电阻器类型:FIXED RESISTOR尺寸代码:1206
表面贴装:YES技术:METAL GLAZE/THICK FILM
温度系数:100 ppm/ °C端子面层:Matte Tin (Sn) - with Nickel (Ni) barrier
端子形状:WRAPAROUND容差:1%
工作电压:200 VBase Number Matches:1

WCR1206-3K9FI 数据手册

 浏览型号WCR1206-3K9FI的Datasheet PDF文件第2页浏览型号WCR1206-3K9FI的Datasheet PDF文件第3页 
General Purpose Surface  
Mounted Resistors  
WCR Series  
·
·
·
·
·
Excellent reliability  
Wide range of sizes and ohmic values  
Wrap around terminations  
Inner electrode protection  
AEC-Q200 grade available  
Electrical Data  
0201  
0402  
0603  
0805  
1206  
1210  
2010  
2512  
0.05  
0.063  
0.1  
0.125  
0.25  
1R0 to 10M  
0.25  
0.5  
1.0  
Power rating @ 70°C  
Resistance range  
watts  
ohms 10R to 1M0 1R0 to 1M0  
Limiting element votage  
TCR*  
Resistance Tolerance  
Standard values  
volts  
ppm/°C  
%
25  
250  
50  
150  
100  
200  
200  
1
E24 or E96  
-55 to 155  
Ambient temperature range  
Zero-ohm Jumper Chip Rating  
°C  
amps  
0.5  
1
1.5  
2
Zero-ohm Jumper Chip Resistance milliohms  
<50  
* Notes – TCR for low values 1R to 10R: -400 to +600ppm/ºC, 11R to 100R: ±±00ppm/ºC  
TCR for high values 3M3 to 10M: ±300ppm/º  
Physical Data  
Dimensions (mm)  
L
T
C
A
W
Style  
0201  
0402  
0603  
0805  
1206  
1210  
2010  
2512  
C
0.6 ± 0.03  
1.0 ± 0.1  
0.23 ± 0.03  
0.35 ± 0.05  
0.5 ± 0.15  
0.12 ± 0.05  
0.2 ± 0.1  
0.25 ± 0.2  
0.4 ± 0.2  
0.15 ± 0.05  
0.25 ± 0.1  
0.25 ± 0.2  
0.4 ± 0.2  
0.3 ± 0.03  
0.5 ± 0.05  
0.8 ± 0.15  
1.25+ 0.2 -0.1  
1.6 + 0.1 -0.15  
2.6 ± 0.15  
2.5 ± 0.15  
3.2 ± 0.15  
T
1.6 ± 0.15  
2.0 ± 0.2  
A
0.5 + 0.15 -0.10  
3.2 +0.1 -0.25  
3.2 + 0.1 -0.2  
5.0 ± 0.15  
6.3 ± 0.15  
0.55 +0.15 -0.1 0.5 + 0.2-0.25 0.5+ 0.2 -0.25  
L
W
A
0.55 +0.15 -0.1  
0.56 ± 0.15  
0.5 ± 0.25  
0.60 ± 0.25  
0.60 ± 0.25  
0.5 ± 0.2  
0.60 ± 0.25  
1.2 ± 0.85  
Wrap-around terminations  
(3 faces)  
0.56 ± 0.15  
Figure 1  
Construction  
Tin Plating  
The chips have a high alumina substrate (96% minimum) with  
Nickel Barrier  
a ruthenium oxide resistance element and silver palladium,  
Dipped Conductor  
coat  
nickel and tin plated terminations. A glazed protection  
is applied to the resistive element (See Fig.1)  
E
Protection  
Glass Dielectric  
Resistance Element  
Terminations  
Solderability  
Silver  
Palladium  
The terminations meet the requirements of  
IEC 115-1, Clause 4.17.3.2.  
Strength  
The terminations meet requirements of  
IEC 68.2.21.  
96% min Alumina Substrate  
General Note  
TT electronics reserves the right to make changes in product specification without notice or liability.  
All information is subject to TT electronics’ own data and is considered accurate at time of going to print.  
www.bitechnologies.com www.irctt.com www.welwyn-tt.com  
07.13  
© TT electronics plc  

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