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W134

更新时间: 2024-02-07 19:12:03
品牌 Logo 应用领域
其他 - ETC 时钟
页数 文件大小 规格书
12页 188K
描述
Clocks and Buffers

W134 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SSOP包装说明:0.150 INCH, LEAD FREE, SSOP-24
针数:24Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.76Is Samacsys:N
JESD-30 代码:R-PDSO-G24JESD-609代码:e4
长度:8.6487 mm湿度敏感等级:3
端子数量:24最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP24,.24
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
主时钟/晶体标称频率:100 MHz认证状态:Not Qualified
座面最大高度:1.7526 mm子类别:Clock Generators
最大压摆率:100 mA最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:3.8989 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

W134 数据手册

 浏览型号W134的Datasheet PDF文件第2页浏览型号W134的Datasheet PDF文件第3页浏览型号W134的Datasheet PDF文件第4页浏览型号W134的Datasheet PDF文件第5页浏览型号W134的Datasheet PDF文件第6页浏览型号W134的Datasheet PDF文件第7页 
W134M/W134S  
Direct Rambus™ Clock Generator  
Features  
Overview  
• Differential clock source for Direct Rambus™ memory  
subsystem for up to 800-MHz data transfer rate  
• Provide synchronizationflexibility: the Rambus®Chan-  
nel can optionally be synchronous to an external sys-  
tem or processor clock  
The Cypress W134M/W134S provides the differential clock  
signals for a Direct Rambus memory subsystem. It includes  
signals to synchronize the Direct Rambus Channel clock to an  
external system clock but can also be used in systems that do  
not require synchronization of the Rambus clock.  
• Power managed output allows Rambus Channel clock  
to be turned off to minimize power consumption for  
mobile applications  
• Works with Cypress CY2210, W133, W158, W159, W161,  
and W167 to support Intel® architecture platforms  
Key Specifications  
Supply Voltage:...................................... V = 3.3V±0.165V  
DD  
Operating Temperature: ................................... 0°C to +70°C  
Input Threshold: .................................................. 1.5V typical  
• Low-power CMOS design packaged in a 24-pin, 150-mil  
SSOP package  
Maximum Input Voltage:.........................................V +0.5V  
DD  
Maximum Input Frequency:..................................... 100 MHz  
Output Duty Cycle: .................................. 40/60% worst case  
Output Type:............................Rambus signaling level (RSL)  
Block Diagram  
Pin Configuration  
REFCLK  
VDDIR  
REFCLK  
VDD  
1
2
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
S0  
PLL  
MULT0:1  
S1  
3
VDD  
GND  
CLK  
NC  
GND  
4
GND  
5
PCLKM  
SYNCLKN  
GND  
6
7
CLKB  
GND  
VDD  
MULT0  
MULT1  
GND  
CLK  
Output  
Logic  
Phase  
Alignment  
PCLKM  
8
CLKB  
VDD  
9
SYNCLKN  
VDDIPD  
STOPB  
PWRDNB  
10  
11  
12  
Test  
Logic  
S0:1  
STOPB  
Direct Rambus is a trademark and Rambus is a registered trademark of Rambus Inc.  
Intel is a registered trademark of Intel Corporation.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
February 18, 2000, rev. *A  
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