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VP2615 PDF预览

VP2615

更新时间: 2024-01-22 07:31:09
品牌 Logo 应用领域
MITEL 解码器
页数 文件大小 规格书
11页 137K
描述
H.261 Decoder

VP2615 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QFP, QFP100,.7X.9Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PQFP-G100
JESD-609代码:e0端子数量:100
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP100,.7X.9封装形状:RECTANGULAR
封装形式:FLATPACK电源:5 V
认证状态:Not Qualified子类别:Other Consumer ICs
表面贴装:YES温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.635 mm端子位置:QUAD

VP2615 数据手册

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VP2615  
H.261 Decoder  
Supersedes January 1996 edition, DS3479 - 3.0  
DS3479 - 4.0 June 1996  
FEATURES  
DESCRIPTION  
The VP2615 decoder forms part of a chip set for use in  
video conferencing and video telephony applications. It  
conforms to the CCITT H261 standard, and will decode data  
coded with full or quarter CIF resolution at frame rates up to 30  
Hz.  
It accepts run length coded coefficients which have already  
been error corrected and Huffman decoded, and produces  
multiplexed YUV data in macro block format after a pipeline  
delay of two MacroBlocks. As shown in Figure 1, other devices  
in the chip set then convert this data into full resolution,  
component or composite, video.  
The incoming run length coded data is converted to  
individual coefficient values in the correct order. Data  
reconstruction is then performed on a block by block basis by  
multiplying the quantized coefficients with the original  
quantization value, and then applying the inverse cosine  
transform. In the inter frame mode this data is then added to  
the motion compensated block from the previous frame. This  
block can be passed through a low pass filter when required.  
A frame store controller produces addresses which allow the  
best fit block to be read from the frame store, and which also  
allow the store to be updated with reconstructed data. Refresh  
cycles are generated when necessary.  
Inputs run length coded transform data  
Outputs 8 bit pixels in YUV block format  
Up to full CIF resolution and 30 Hz frame rates  
Supports motion compensation with up to 15 pixel  
movement  
On chip frame store controller  
100 pin QFP package  
ASSOCIATED PRODUCTS  
VP510 Colour Space Converter  
VP520S Three Channel Video Filter  
VP2611 Integrated H261 Encoder  
VP2612 Video Multiplexer  
VP2614 Video Demultiplexer  
SYSTEM  
USER  
CONTROLLER  
INTERFACE  
VP2615  
VIDEO  
DECODER  
VP520  
3 CHANNEL  
VIDEO FILTER  
FRMOUT  
MACRO  
BLOCK  
DATA  
H261  
BIT  
STREAM  
VP530  
NTSC/PAL  
ENCODER  
Y/CR/CB  
COMP  
NTSC/PAL  
VP2614  
VIDEO DEMUX  
RLC  
DATA  
ADR  
DATA  
VP510  
COLOUR SPACE  
CONVERTER  
ADR  
CIF FRAME  
STORE  
128K X 16  
TWO CIF  
FRAME STORES  
256K X 16  
RECEIVE  
BUFFER  
32K X 8  
R G B  
OUTPUTS  
Fig 1 : Typical Video Conferencing Receiver  

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