Datasheet > UPD703035AY

UPD703035AY

更新时间： 2022-03-04 05:25:37

品牌	Logo	应用领域
日电电子 - NEC		微控制器
页数	文件大小	规格书
56页	350K
描述
V850/SB2TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS

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UPD703035AY 数据手册

DATA SHEET

MOS INTEGRATED CIRCUIT

PD703034A, 703034AY, 703035A,

703035AY, 70F3035A, 70F3035AY

V850/SB2^TM

32-/16-BIT SINGLE-CHIP MICROCONTROLLERS

DESCRIPTION

The µPD703034A, 703034AY, 703035A, 703035AY, 70F3035A, and 70F3035AY (V850/SB2) are 32-/16-bit

single-chip microcontrollers of the V850 Family^TMfor AV equipment. 32-bit CPU, ROM, RAM, timer/counters, serial

interfaces, A/D converter, DMA controller, and so on are integrated on a single chip.

The µPD70F3035A and 70F3035AY have flash memory in place of the internal mask ROM of the µPD703035A

and 703035AY. Because flash memory allows the program to be written and erased electrically with the device

mounted on the board, these products are ideal for the evaluation stages of system development, small-scale

production, and rapid development of new products.

Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before

designing.

V850/SB1^TM, V850/SB2 User’s Manual Hardware: U13850E

V850 Family User’s Manual Architecture:

U10243E

FEATURES

{ Number of instructions: 74

{ Minimum instruction execution time: 76.9 ns (@ internal 13 MHz operation)

{ General-purpose registers: 32 bits × 32 registers

{ Instruction set: Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions,

load/store instructions

{ Memory space: 16 MB linear address space

{ Internal memory ROM: 128 KB (µPD703034A, 703034AY: mask ROM)

256 KB (µPD703035A, 703035AY: mask ROM)

256 KB (µPD70F3035A, 70F3035AY: flash memory)

RAM: 12 KB (µPD703034A, 703034AY)

16 KB (µPD703035A, 703035AY, 70F3035A, 70F3035AY)

{ Interrupt/exception: µPD703034A, 703035A, 70F3035A (external: 8, internal: 32 sources, exception: 1 source)

µPD703034AY, 703035AY, 70F3035AY (external: 8, internal: 33 sources, exception: 1 source)

{ I/O lines Total: 83

{ Timer/counters: 16-bit timer (2 channels: TM0, TM1)

8-bit timer (6 channels: TM2 to TM7)

{ Watch timer: 1 channel

{ Watchdog timer: 1 channel

{ IEBus controller: 1 channel

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. U14780EJ1V0DS00 (1st edition)

Date Published May 2000 N CP(K)

Printed in Japan

2000

12 3 4 5 6 7...56

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