Datasheet > UCSR3654

UCSR3654

更新时间： 2023-12-06 20:02:53

品牌	Logo	应用领域
友顺 - UTC		/
页数	文件大小	规格书
9页	221K
描述
high precision cc/cv primary-side pwm power s...

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UCSR3654 数据手册

UCSR3654

Preliminary

CMOS IC



OPERATION DESCRIPTION (Cont.)

Large

Rcs

V_OUT

Small

Rcs

I_OUT

Figure 3. Adjustable output power by changing R_CS

Figure 4. Secondary current waveform

In CC operation, the CC loop control function of UTC UCSR3654 will keep a fixed proportion between secondary

inductance de-magnetization time (Tdemag) and switching cycle time (Tsw). The fixed proportion is

Tdemag

Tsw

(2)

Thus the output current is given by:

Tdemag

Tsw

(3)

IOUT 



IPK 





IPK

Programmable Cable Drop Compensation

UTC UCSR3654 has a built-in cable voltage drop compensation to achieve good load regulation. An offset voltage

is generated at INV pin by an internal current flowing into the resistor divider. The current is inversely proportional to

the voltage of COMP pin. As a result, it is inversely proportional to the output load current. The voltage drop across

the cable is compensated by this offset voltage at INV pin. It can also be programmed by adjusting the resistance of

the divider to compensate the drop for various cable lines used.

Current Sensing and Leading Edge Blanking

Cycle-by-cycle current limiting is offered in UTC UCSR3654. The switch current is detected by a sense resistor

into the CS pin. When the power switch is turned on, a turn-on spike will occur on this resistor. A 900ns leading-edge

blanking is built in to avoid false-termination of the switching pulse so that the external RC filtering is no longer

needed.

UNISONIC TECHNOLOGIES CO., LTD

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